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vc/amd/opensil/genoa_poc/mpio: move PCIe port function below mpio chip

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Move the gpp_bridge_* device functions that are bridges to the external
PCIe ports below the corresponding mpio chip. This avoids the need for
dummy devices and does things in a slightly more coreboot-native way.

TEST=PCIe lane config reported by openSIL is identical

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: Varshit Pandya <pandyavarshit@gmail.com>
Change-Id: I7e39bf68d30d7d00b16f943953e8207d6fe9ef41
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81340
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Varshit Pandya <pandyavarshit@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Felix Held
2024-03-18 21:08:25 +01:00
parent 15784f1b03
commit 4b187551d2
3 changed files with 328 additions and 192 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/vendorcode/amd/opensil/genoa_poc/mpio/chip.c
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@@ -198,5 +198,5 @@ void configure_mpio(void)
for (struct device *dev = &dev_root; dev; dev = dev->next)
if (dev->chip_ops == &vendorcode_amd_opensil_genoa_poc_mpio_ops &&
dev->chip_info != dev->upstream->dev->chip_info)
per_device_config(mpio_data, dev->upstream->dev, dev->chip_info);
per_device_config(mpio_data, dev, dev->chip_info);
}