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google/slippy: consolidate variants' common mainboard.asl code

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Move code common code from each variant's mainboard.asl into
common ACPI code for all variants (like google/auron).  This also
adds the _PRW method for the LID0 device for falco and peppy, which
omitted the function  when they were originally upstreamed.

See Chromium commit c8b41f7, falco: Add _PRW for LID0 ACPI Device

Change-Id: I7f5129340249a986f5996af37c01ccbde8d374e8
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/18368
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Matt DeVillier 2017-02-14 23:00:57 -06:00 committed by Martin Roth
parent 75da1fb2ba
commit 4b8252ed76
6 changed files with 40 additions and 89 deletions
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39
src/mainboard/google/slippy/acpi/mainboard.asl Normal file
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@ -0,0 +1,39 @@
/*
* This file is part of the coreboot project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; version 2 of
* the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <onboard.h>
Scope (\_SB)
{
Device (LID0)
{
Name(_HID, EisaId("PNP0C0D"))
Method(_LID, 0)
{
Store (\_SB.PCI0.LPCB.EC0.LIDS, \LIDS)
Return (\LIDS)
}
// There is no GPIO for LID, the EC pulses WAKE# pin instead.
// There is no GPE for WAKE#, so fake it with PCI_EXP_WAKE
Name (_PRW, Package(){ 0x69, 5 }) // PCI_EXP
}
Device (PWRB)
{
Name(_HID, EisaId("PNP0C0C"))
}
}
#include <variant/acpi/mainboard.asl>

2
src/mainboard/google/slippy/dsdt.asl
View File

@ -54,7 +54,7 @@ DefinitionBlock(
}
// Mainboard specific
#include <variant/acpi/mainboard.asl>
#include "acpi/mainboard.asl"
// Thermal handler
#include "acpi/thermal.asl"

20
src/mainboard/google/slippy/variants/falco/include/variant/acpi/mainboard.asl
View File

@ -14,26 +14,6 @@
* GNU General Public License for more details.
*/
#include <onboard.h>
Scope (\_SB)
{
Device (LID0)
{
Name(_HID, EisaId("PNP0C0D"))
Method(_LID, 0)
{
Store (\_SB.PCI0.LPCB.EC0.LIDS, \LIDS)
Return (\LIDS)
}
}
Device (PWRB)
{
Name(_HID, EisaId("PNP0C0C"))
}
}
Scope (\_SB.PCI0.I2C0)
{
Device (CTPA)

24
src/mainboard/google/slippy/variants/leon/include/variant/acpi/mainboard.asl
View File

@ -14,30 +14,6 @@
* GNU General Public License for more details.
*/
#include <onboard.h>
Scope (\_SB)
{
Device (LID0)
{
Name(_HID, EisaId("PNP0C0D"))
Method(_LID, 0)
{
Store (\_SB.PCI0.LPCB.EC0.LIDS, \LIDS)
Return (\LIDS)
}
// There is no GPIO for LID, the EC pulses WAKE# pin instead.
// There is no GPE for WAKE#, so fake it with PCI_EXP_WAKE
Name (_PRW, Package(){ 0x69, 5 }) // PCI_EXP
}
Device (PWRB)
{
Name(_HID, EisaId("PNP0C0C"))
}
}
Scope (\_SB.PCI0.I2C0)
{
Device (CTPA)

20
src/mainboard/google/slippy/variants/peppy/include/variant/acpi/mainboard.asl
View File

@ -14,26 +14,6 @@
* GNU General Public License for more details.
*/
#include <onboard.h>
Scope (\_SB)
{
Device (LID0)
{
Name(_HID, EisaId("PNP0C0D"))
Method(_LID, 0)
{
Store (\_SB.PCI0.LPCB.EC0.LIDS, \LIDS)
Return (\LIDS)
}
}
Device (PWRB)
{
Name(_HID, EisaId("PNP0C0C"))
}
}
Scope (\_SB.PCI0.I2C0)
{
Device (ETPA)

24
src/mainboard/google/slippy/variants/wolf/include/variant/acpi/mainboard.asl
View File

@ -14,30 +14,6 @@
* GNU General Public License for more details.
*/
#include <onboard.h>
Scope (\_SB)
{
Device (LID0)
{
Name(_HID, EisaId("PNP0C0D"))
Method(_LID, 0)
{
Store (\_SB.PCI0.LPCB.EC0.LIDS, \LIDS)
Return (\LIDS)
}
// There is no GPIO for LID, the EC pulses WAKE# pin instead.
// There is no GPE for WAKE#, so fake it with PCI_EXP_WAKE
Name (_PRW, Package(){ 0x69, 5 }) // PCI_EXP
}
Device (PWRB)
{
Name(_HID, EisaId("PNP0C0C"))
}
}
Scope (\_SB.PCI0.I2C0)
{
Device (CTPA)