soc/intel: Add definition of D0 stepping for TigerLake Halo

Change-Id: Ic080ffe7912ad71c77af09d2f3d1d9b08d9ffac8
Signed-off-by: Alicja Michalska <ahplka19@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80849
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>

src/include/cpu/intel/cpu_ids.h

@@ -46,6 +46,7 @@
 #define CPUID_COMETLAKE_H_S_10_2_Q0	0xa0655
 #define CPUID_TIGERLAKE_A0		0x806c0
 #define CPUID_TIGERLAKE_B0		0x806c1
+#define CPUID_TIGERLAKE_P0		0x806d0
 #define CPUID_TIGERLAKE_R0		0x806d1
 #define CPUID_SAPPHIRERAPIDS_SP_A	0x806f0
 #define CPUID_SAPPHIRERAPIDS_SP_B	0x806f1

src/soc/intel/common/block/cpu/mp_init.c

@@ -71,6 +71,7 @@ static const struct cpu_device_id cpu_table[] = {
 	{ X86_VENDOR_INTEL, CPUID_COMETLAKE_H_S_10_2_Q0, CPUID_EXACT_MATCH_MASK },
 	{ X86_VENDOR_INTEL, CPUID_TIGERLAKE_A0, CPUID_EXACT_MATCH_MASK },
 	{ X86_VENDOR_INTEL, CPUID_TIGERLAKE_B0, CPUID_EXACT_MATCH_MASK },
+	{ X86_VENDOR_INTEL, CPUID_TIGERLAKE_P0, CPUID_EXACT_MATCH_MASK },
 	{ X86_VENDOR_INTEL, CPUID_TIGERLAKE_R0, CPUID_EXACT_MATCH_MASK },
 	{ X86_VENDOR_INTEL, CPUID_ELKHARTLAKE_A0, CPUID_EXACT_MATCH_MASK },
 	{ X86_VENDOR_INTEL, CPUID_ELKHARTLAKE_B0, CPUID_EXACT_MATCH_MASK },

src/soc/intel/tigerlake/bootblock/report_platform.c

@@ -25,6 +25,7 @@ static struct {
 } cpu_table[] = {
 	{ CPUID_TIGERLAKE_A0, "Tigerlake A0" },
 	{ CPUID_TIGERLAKE_B0, "Tigerlake B0" },
+	{ CPUID_TIGERLAKE_P0, "Tigerlake P0" },
 	{ CPUID_TIGERLAKE_R0, "Tigerlake R0" },
 };