Move TCSS code to oryp11

Change-Id: I76eec8f7ca69bdc32a57f2e41b64f1e82730c361
This commit is contained in:
Jeremy Soller
2023-03-03 10:29:37 -07:00
parent c6341b2a42
commit 4f2e68fc4b
4 changed files with 11 additions and 8 deletions

View File

@@ -16,10 +16,8 @@ config BOARD_SYSTEM76_RPL_COMMON
select NO_UART_ON_SUPERIO
select PCIEXP_SUPPORT_RESIZABLE_BARS
select SOC_INTEL_ALDERLAKE_S3
select SOC_INTEL_ALDERLAKE_TCSS_USB4_SUPPORT
select SOC_INTEL_COMMON_BLOCK_HDA_VERB
select SOC_INTEL_CRASHLOG
select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES
select SOC_INTEL_RAPTORLAKE
select SPD_READ_BY_WORD
select SYSTEM_TYPE_LAPTOP
@@ -31,6 +29,7 @@ config BOARD_SYSTEM76_ADDW3
select EC_SYSTEM76_EC_COLOR_KEYBOARD
select EC_SYSTEM76_EC_DGPU
select MAINBOARD_USES_IFD_GBE_REGION
select PCIEXP_HOTPLUG
select SOC_INTEL_ALDERLAKE_PCH_S
config BOARD_SYSTEM76_GAZE18
@@ -48,6 +47,7 @@ config BOARD_SYSTEM76_ORYP11
select EC_SYSTEM76_EC_COLOR_KEYBOARD
select EC_SYSTEM76_EC_DGPU
select SOC_INTEL_ALDERLAKE_PCH_P
select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES
config BOARD_SYSTEM76_SERW13
def_bool n
@@ -55,6 +55,7 @@ config BOARD_SYSTEM76_SERW13
select DRIVERS_GFX_NVIDIA
select EC_SYSTEM76_EC_COLOR_KEYBOARD
select EC_SYSTEM76_EC_DGPU
select PCIEXP_HOTPLUG
select SOC_INTEL_ALDERLAKE_PCH_S
if BOARD_SYSTEM76_RPL_COMMON

View File

@@ -33,11 +33,6 @@ chip soc/intel/alderlake
register "gfx" = "GMA_DEFAULT_PANEL(0)"
end
device ref tbt_pcie_rp0 on end
device ref tcss_xhci on
register "tcss_ports[0]" = "TCSS_PORT_DEFAULT(OC_SKIP)"
end
device ref tcss_dma0 on end
device ref shared_sram on end
device ref cnvi_wifi on
register "cnvi_bt_core" = "true"

View File

@@ -19,7 +19,9 @@ DefinitionBlock(
{
#include <soc/intel/common/block/acpi/acpi/northbridge.asl>
#include <soc/intel/alderlake/acpi/southbridge.asl>
#include <soc/intel/alderlake/acpi/tcss.asl>
#if CONFIG(BOARD_SYSTEM76_ORYP11)
#include <soc/intel/alderlake/acpi/tcss.asl>
#endif // CONFIG(BOARD_SYSTEM76_ORYP11)
}
#include <southbridge/intel/common/acpi/sleepstates.asl>

View File

@@ -2,6 +2,11 @@ chip soc/intel/alderlake
device domain 0 on
subsystemid 0x1558 0x66a2 inherit
device ref tbt_pcie_rp0 on end
device ref tcss_xhci on
register "tcss_ports[0]" = "TCSS_PORT_DEFAULT(OC_SKIP)"
end
device ref tcss_dma0 on end
device ref xhci on
# USB2
register "usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)" # AJ_USB1: USB-A 3.2 Gen 1 (Left)