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mb/google/brya/var/crota: Add DPTF setting in Crota

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DPTF Policy and temperature sensor values from thermal team.

BUG=b:237640264
TEST=USE="project_crota emerge-brya coreboot" and verify it builds
without error.

Signed-off-by: Johnny Li <johnny_li@wistron.corp-partner.google.com>
Change-Id: I43340bd1acfe6ec2036ea80339dbf896615a456a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65563
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Johnny Li 2022-06-30 22:28:22 +08:00 committed by Nick Vaccaro
parent ab5cf13079
commit 5242eef3ad
1 changed files with 53 additions and 0 deletions
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53
src/mainboard/google/brya/variants/crota/overridetree.cb
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@ -81,6 +81,59 @@ chip soc/intel/alderlake
register "tcss_ports[1]" = "TCSS_PORT_EMPTY"
device domain 0 on
device ref dtt on
chip drivers/intel/dptf
## sensor information
register "options.tsr[0].desc" = ""SOC""
register "options.tsr[1].desc" = ""DRAM""
register "options.tsr[2].desc" = ""Charger""
register "options.tsr[3].desc" = ""Ambient""
## Passive Policy
register "policies.passive" = "{
[0] = DPTF_PASSIVE(CPU, CPU, 95, 5000),
[1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 75, 5000),
[2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 75, 5000),
[3] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_2, 75, 5000),
[4] = DPTF_PASSIVE(CPU, TEMP_SENSOR_3, 75, 5000),
}"
## Critical Policy
register "policies.critical" = "{
[0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN),
[1] = DPTF_CRITICAL(TEMP_SENSOR_0, 85, SHUTDOWN),
[2] = DPTF_CRITICAL(TEMP_SENSOR_1, 85, SHUTDOWN),
[3] = DPTF_CRITICAL(TEMP_SENSOR_2, 85, SHUTDOWN),
[4] = DPTF_CRITICAL(TEMP_SENSOR_3, 85, SHUTDOWN),
}"
register "controls.power_limits" = "{
.pl1 = {
.min_power = 3000,
.max_power = 15000,
.time_window_min = 28 * MSECS_PER_SEC,
.time_window_max = 32 * MSECS_PER_SEC,
.granularity = 200,
},
.pl2 = {
.min_power = 55000,
.max_power = 55000,
.time_window_min = 28 * MSECS_PER_SEC,
.time_window_max = 32 * MSECS_PER_SEC,
.granularity = 1000,
}
}"
## Charger Performance Control (Control, mA)
register "controls.charger_perf" = "{
[0] = { 255, 1700 },
[1] = { 24, 1500 },
[2] = { 16, 1000 },
[3] = { 8, 500 }
}"
device generic 0 alias dptf_policy on end
end
end
device ref cnvi_wifi on
chip drivers/wifi/generic
register "wake" = "GPE0_PME_B0"