soc/intel/common/block: add bios caching to fast spi module
Add fast_spi_cache_bios_region() that sets up a variable MTRR as write-protect covering the fast spi BIOS region. Change-Id: I282c5173cc655004daf16ea2e85423aaded3648d Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/20019 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Subrata Banik <subrata.banik@intel.com> Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
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@@ -23,7 +23,6 @@
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#include <console/console.h>
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#include <fmap.h>
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#include <intelblocks/fast_spi.h>
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#include <soc/mmap_boot.h>
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/*
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* BIOS region on the flash is mapped right below 4GiB in the address
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@@ -133,9 +132,3 @@ const struct cbfs_locator cbfs_master_header_locator = {
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.name = "IAFW Locator",
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.locate = iafw_boot_region_properties,
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};
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size_t get_bios_size(void)
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{
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bios_mmap_init();
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return car_get_var(bios_size);
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}
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