soc/intel/common/block: add bios caching to fast spi module

Add fast_spi_cache_bios_region() that sets up a variable
MTRR as write-protect covering the fast spi BIOS region.

Change-Id: I282c5173cc655004daf16ea2e85423aaded3648d
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/20019
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
This commit is contained in:
Aaron Durbin
2017-06-02 12:16:04 -05:00
parent d86e0e6638
commit 5391e554e1
6 changed files with 31 additions and 82 deletions

View File

@@ -23,7 +23,6 @@
#include <console/console.h>
#include <fmap.h>
#include <intelblocks/fast_spi.h>
#include <soc/mmap_boot.h>
/*
* BIOS region on the flash is mapped right below 4GiB in the address
@@ -133,9 +132,3 @@ const struct cbfs_locator cbfs_master_header_locator = {
.name = "IAFW Locator",
.locate = iafw_boot_region_properties,
};
size_t get_bios_size(void)
{
bios_mmap_init();
return car_get_var(bios_size);
}