mb/google/zork: Add touchscreen power control

This change adds support for touchscreen power control using:
* GPIO_90 for trembyle based boards
* GPIO_32 for dalboz based boards

By default, baseboard tables configure these GPIOs as PAD_GPO driven
low and override trees expose these pads as enable_gpio to be used by
ACPI power resource.

In order to support pre-v3.6 boards, override tables configure these
pads as PAD_NC and drop the enable_gpio setting from device tree based
on board version.

BUG=b:161935640, b:162747210

Change-Id: Iba5e36b65b44ea11613b4d5fc8f13ce6433f83ab
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44193
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Furquan Shaikh
2020-08-05 14:54:39 -07:00
parent cc6c41f8d8
commit 5474f8e3cf
15 changed files with 40 additions and 4 deletions

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@@ -65,8 +65,8 @@ static const struct soc_amd_gpio gpio_set_stage_ram[] = {
PAD_NF(GPIO_30, ESPI_CS_L, PULL_NONE),
/* EC_AP_INT_ODL (Sensor Framesync) */
PAD_GPI(GPIO_31, PULL_NONE),
/* TP */
PAD_NC(GPIO_32),
/* EN_PWR_TOUCHSCREEN */
PAD_GPO(GPIO_32, LOW),
/* GPIO_33 - GPIO_39: Not available */
/* NVME_AUX_RESET_L */
PAD_GPO(GPIO_40, HIGH),

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@@ -111,8 +111,8 @@ static const struct soc_amd_gpio gpio_set_stage_ram[] = {
PAD_NF(GPIO_88, EMMC_DATA5, PULL_NONE),
/* EN_DEV_BEEP_L */
PAD_GPO(GPIO_89, HIGH),
/* Testpoint */
PAD_NC(GPIO_90),
/* EN_PWR_TOUCHSCREEN */
PAD_GPO(GPIO_90, LOW),
/* EN_SPKR */
PAD_GPO(GPIO_91, LOW),
/* CLK_REQ0_L - WIFI */

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@@ -251,5 +251,7 @@ void variant_touchscreen_update(void)
continue;
cfg->reset_gpio.active_low = 0;
cfg->enable_gpio.pin_count = 0;
cfg->enable_gpio.pins[0] = 0;
}
}

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@@ -27,6 +27,8 @@ static const struct soc_amd_gpio berknip_bid1_gpio_set_stage_ram[] = {
};
static const struct soc_amd_gpio berknip_bid2_gpio_set_stage_ram[] = {
/* TP */
PAD_NC(GPIO_90),
/* USI_RESET */
PAD_GPO(GPIO_140, HIGH),
};

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@@ -71,6 +71,8 @@ chip soc/amd/picasso
register "desc" = ""Raydium Touchscreen""
register "probed" = "1"
register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_12)"
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_90)"
register "enable_delay_ms" = "1"
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_140)"
# 32ms: Rise time of the reset line
# 20ms: Firmware ready time
@@ -84,6 +86,8 @@ chip soc/amd/picasso
register "desc" = ""ELAN Touchscreen""
register "probed" = "1"
register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_12)"
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_90)"
register "enable_delay_ms" = "1"
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_140)"
register "reset_delay_ms" = "20"
register "has_power_resource" = "1"
@@ -94,6 +98,8 @@ chip soc/amd/picasso
register "generic.desc" = ""G2TOUCH Touchscreen""
register "generic.irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_12)"
register "generic.probed" = "1"
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_90)"
register "generic.enable_delay_ms" = "1"
register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_140)"
register "generic.reset_delay_ms" = "50"
register "generic.has_power_resource" = "1"

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@@ -13,6 +13,8 @@ static const struct soc_amd_gpio bid_1_gpio_set_stage_ram[] = {
PAD_GPO(GPIO_6, LOW), // Select Camera 1 DMIC
/* USB_OC2_L - USB A0 & A1 */
PAD_NF(GPIO_18, USB_OC2_L, PULL_NONE),
/* TP */
PAD_NC(GPIO_32),
/* EN_PWR_TOUCHPAD_PS2 */
PAD_GPO(GPIO_67, HIGH),
/* USI_RESET */
@@ -24,6 +26,8 @@ static const struct soc_amd_gpio bid_1_gpio_set_stage_ram[] = {
static const struct soc_amd_gpio bid_2_gpio_set_stage_ram[] = {
/* DMIC_SEL */
PAD_GPO(GPIO_6, LOW), // Select Camera 1 DMIC
/* TP */
PAD_NC(GPIO_32),
/* EN_PWR_TOUCHPAD_PS2 */
PAD_GPO(GPIO_67, HIGH),
/* USI_RESET */

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@@ -8,6 +8,8 @@
#include <ec/google/chromeec/ec.h>
static const struct soc_amd_gpio bid_1_gpio_set_stage_ram[] = {
/* TP */
PAD_NC(GPIO_32),
/* USI_RESET */
PAD_GPO(GPIO_140, HIGH),
};

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@@ -39,6 +39,8 @@ static const struct soc_amd_gpio ezkinil_bid2_gpio_set_stage_ram[] = {
PAD_NC(GPIO_69),
/* MST_GPIO_2 (Fw Update HDMI hub) Change NC */
PAD_NC(GPIO_86),
/* TP */
PAD_NC(GPIO_90),
/* USI_RESET */
PAD_GPO(GPIO_140, HIGH),
};
@@ -48,6 +50,8 @@ static const struct soc_amd_gpio ezkinil_bid3_gpio_set_stage_ram[] = {
PAD_NC(GPIO_11),
/* FPMCU_BOOT0 Change NC */
PAD_NC(GPIO_69),
/* TP */
PAD_NC(GPIO_90),
/* USI_RESET */
PAD_GPO(GPIO_140, HIGH),
};

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@@ -73,6 +73,8 @@ chip soc/amd/picasso
register "desc" = ""Raydium Touchscreen""
register "probed" = "1"
register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_12)"
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_90)"
register "enable_delay_ms" = "1"
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_140)"
# 32ms: Rise time of the reset line
# 20ms: Firmware ready time
@@ -86,6 +88,8 @@ chip soc/amd/picasso
register "generic.desc" = ""ELAN Touchscreen""
register "generic.probed" = "1"
register "generic.irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_12)"
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_90)"
register "generic.enable_delay_ms" = "1"
register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_140)"
register "generic.reset_delay_ms" = "20"
register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_144)"

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@@ -48,6 +48,8 @@ static const struct soc_amd_gpio morphius_bid2_gpio_set_stage_ram[] = {
};
static const struct soc_amd_gpio morphius_bid3_gpio_set_stage_ram[] = {
/* TP */
PAD_NC(GPIO_90),
/* USI_RESET */
PAD_GPO(GPIO_140, HIGH),
};

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@@ -71,6 +71,8 @@ chip soc/amd/picasso
register "generic.desc" = ""Goodix Touchscreen""
register "generic.irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_12)"
register "generic.probed" = "1"
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_90)"
register "generic.enable_delay_ms" = "10"
register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_140)"
register "generic.reset_delay_ms" = "120"
register "generic.reset_off_delay_ms" = "1"

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@@ -8,6 +8,8 @@
#include <ec/google/chromeec/ec.h>
static const struct soc_amd_gpio bid_1_gpio_set_stage_ram[] = {
/* TP */
PAD_NC(GPIO_32),
/* USI_RESET */
PAD_GPO(GPIO_140, HIGH),
};

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@@ -96,6 +96,8 @@ chip soc/amd/picasso
register "generic.desc" = ""Goodix Touchscreen""
register "generic.irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_12)"
register "generic.probed" = "1"
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_32)"
register "generic.enable_delay_ms" = "10"
register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_140)"
register "generic.reset_off_delay_ms" = "1"
register "generic.reset_delay_ms" = "120"

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@@ -18,6 +18,8 @@ static const struct soc_amd_gpio woomax_gpio_set_stage_ram[] = {
PAD_NC(GPIO_69),
/* RAM_ID_4 */
PAD_NC(GPIO_84),
/* TP */
PAD_NC(GPIO_90),
/* USI_RESET */
PAD_GPO(GPIO_140, HIGH),
/* GPIO_141 NC */

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@@ -69,6 +69,8 @@ chip soc/amd/picasso
register "generic.desc" = ""ELAN Touchscreen""
register "generic.probed" = "1"
register "generic.irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_12)"
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_90)"
register "generic.enable_delay_ms" = "1"
register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_140)"
register "generic.reset_delay_ms" = "20"
register "generic.has_power_resource" = "1"