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Change all clrsetbits_leXX() to clrsetbitsXX()

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This patch changes all existing instances of clrsetbits_leXX() to the
new endian-independent clrsetbitsXX(), after double-checking that
they're all in SoC-specific code operating on CPU registers and not
actually trying to make an endian conversion.

This patch was created by running

 sed -i -e 's/\([cs][le][rt]bits\)_le\([136][624]\)/\1\2/g'

across the codebase and cleaning up formatting a bit.

Change-Id: I7fc3e736e5fe927da8960fdcd2aae607b62b5ff4
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37433
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
This commit is contained in:
Julius Werner
2019-12-02 22:03:27 -08:00
committed by Patrick Georgi
parent 1c37157218
commit 55009af42c
108 changed files with 2022 additions and 2025 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
src/soc/qualcomm/sc7180/gpio.c
View File

@@ -13,9 +13,9 @@
* GNU General Public License for more details.
*/
#include <arch/mmio.h>
#include <assert.h>
#include <delay.h>
#include <device/mmio.h>
#include <timer.h>
#include <timestamp.h>
#include <types.h>
@@ -86,9 +86,9 @@ void gpio_input_irq(gpio_t gpio, enum gpio_irq_type type, uint32_t pull)
gpio_configure(gpio, GPIO_FUNC_GPIO,
pull, GPIO_2MA, GPIO_OUTPUT_DISABLE);
clrsetbits_le32(&regs->intr_cfg, GPIO_INTR_DECT_CTL_MASK <<
clrsetbits32(&regs->intr_cfg, GPIO_INTR_DECT_CTL_MASK <<
GPIO_INTR_DECT_CTL_SHIFT, type << GPIO_INTR_DECT_CTL_SHIFT);
clrsetbits_le32(&regs->intr_cfg, GPIO_INTR_RAW_STATUS_ENABLE
clrsetbits32(&regs->intr_cfg, GPIO_INTR_RAW_STATUS_ENABLE
<< GPIO_INTR_RAW_STATUS_EN_SHIFT, GPIO_INTR_RAW_STATUS_ENABLE
<< GPIO_INTR_RAW_STATUS_EN_SHIFT);
}