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mb/pcengines/apu2/mainboard: add/fix comments on PIRQ table

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Align the comments on the PIRQ table entries for the PCI bridge devices
to the external PCIe ports with the devicetrees of the different APU
boards.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Id25ae8422c7c5c79dc8666a28a8219c77af324da
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79676
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
Felix Held 2023-12-21 00:23:35 +01:00
parent 8d8c68157d
commit 580c166eb2
1 changed files with 4 additions and 4 deletions
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8
src/mainboard/pcengines/apu2/mainboard.c
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@ -95,11 +95,11 @@ static const struct pirq_struct mainboard_pirq_data[] = {
/* {PCI_devfn, {PIN A, PIN B, PIN C, PIN D}}, */
{GFX_DEVFN, {PIRQ_A, PIRQ_NC, PIRQ_NC, PIRQ_NC}}, /* VGA: 01.0 */
{ACTL_DEVFN, {PIRQ_NC, PIRQ_B, PIRQ_NC, PIRQ_NC}}, /* Audio: 01.1 */
{NB_PCIE_PORT1_DEVFN, {PIRQ_A, PIRQ_B, PIRQ_C, PIRQ_D}}, /* x4 PCIe: 02.1 */
{NB_PCIE_PORT2_DEVFN, {PIRQ_B, PIRQ_C, PIRQ_D, PIRQ_A}}, /* mPCIe: 02.2 */
{NB_PCIE_PORT1_DEVFN, {PIRQ_A, PIRQ_B, PIRQ_C, PIRQ_D}}, /* mPCIe/NIC: 02.1 */
{NB_PCIE_PORT2_DEVFN, {PIRQ_B, PIRQ_C, PIRQ_D, PIRQ_A}}, /* NIC: 02.2 */
{NB_PCIE_PORT3_DEVFN, {PIRQ_C, PIRQ_D, PIRQ_A, PIRQ_B}}, /* NIC: 02.3 */
{NB_PCIE_PORT4_DEVFN, {PIRQ_D, PIRQ_A, PIRQ_B, PIRQ_C}}, /* 02.4 */
{NB_PCIE_PORT5_DEVFN, {PIRQ_A, PIRQ_B, PIRQ_C, PIRQ_D}}, /* 02.5 */
{NB_PCIE_PORT4_DEVFN, {PIRQ_D, PIRQ_A, PIRQ_B, PIRQ_C}}, /* NIC: 02.4 */
{NB_PCIE_PORT5_DEVFN, {PIRQ_A, PIRQ_B, PIRQ_C, PIRQ_D}}, /* mPCIe: 02.5 */
{XHCI_DEVFN, {PIRQ_C, PIRQ_NC, PIRQ_NC, PIRQ_NC}}, /* XHCI: 10.0 */
{SATA_DEVFN, {PIRQ_SATA, PIRQ_NC, PIRQ_NC, PIRQ_NC}}, /* SATA: 11.0 */
{OHCI1_DEVFN, {PIRQ_OHCI1, PIRQ_NC, PIRQ_NC, PIRQ_NC}}, /* OHCI1: 12.0 */