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galp5: Set DGPU GPIO delays to prevent RTD3 crashes

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Change-Id: I7deb8a22b767164357bc408f666603d65cedc439
This commit is contained in:
Jeremy Soller
2021-02-08 14:46:08 -07:00
committed by Jeremy Soller
parent e5cb4d2fc5
commit 5a303e242e
1 changed files with 4 additions and 0 deletions
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4
src/mainboard/system76/galp5/devicetree.cb
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@@ -293,6 +293,10 @@ chip soc/intel/tigerlake
chip soc/intel/common/block/pcie/rtd3
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_U5)" # DGPU_PWR_EN
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_U4)" # DGPU_RST#_PCH
register "enable_delay_ms" = "16"
register "enable_off_delay_ms" = "4"
register "reset_delay_ms" = "10"
register "reset_off_delay_ms" = "4"
register "srcclk_pin" = "2" # PEG_CLKREQ#
device generic 0 on end
end