tegra124: use the common verstage flow
Though the tegra124 SoC makes their faster cpus come up in verstage it can still use the common flow. Therefore, use the common verstage API for performing thenecessary steps to initialize the caches on the faster cores. BUG=chrome-os-partner:44827 BRANCH=None TEST=Built nyan. Change-Id: I93023ec92a9de111db688742b057b5c64143f0b3 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/11776 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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@@ -27,6 +27,7 @@
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#include <soc/early_configs.h>
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#include <stdlib.h>
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#include <symbols.h>
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#include <vendorcode/google/chromeos/chromeos.h>
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static void enable_cache(void)
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{
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@@ -40,27 +41,17 @@ static void enable_cache(void)
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dcache_mmu_enable();
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}
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/* Do the minimum to run vboot at full speed */
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static void soc_init(void)
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void verstage_mainboard_init(void)
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{
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/* Do the minimum to run vboot at full speed */
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configure_l2_cache();
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console_init();
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exception_init();
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enable_cache();
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}
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static void verstage(void)
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{
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soc_init();
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early_mainboard_init();
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run_romstage();
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}
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void main(void)
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{
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asm volatile ("bl arm_init_caches"
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: : : "r0", "r1", "r2", "r3", "r4", "r5", "ip");
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verstage();
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hlt();
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}
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