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src: Replace MSR addresses with macros

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Change-Id: I849dd406f5ccc733d4957eaf1c774745782f531a
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/28784
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
This commit is contained in:
Elyes HAOUAS
2018-09-28 09:06:43 +02:00
committed by Martin Roth
parent de5d04011c
commit 603963e1ba
4 changed files with 11 additions and 11 deletions
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10
src/cpu/intel/microcode/microcode.c
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@@ -102,7 +102,7 @@ void intel_microcode_load_unlocked(const void *microcode_patch)
msr.lo = (unsigned long)m + sizeof(struct microcode);
msr.hi = 0;
wrmsr(0x79, msr);
wrmsr(IA32_BIOS_UPDT_TRIG, msr);
#if !defined(__ROMCC__)
printk(BIOS_DEBUG, "microcode: updated to revision "
@@ -158,12 +158,12 @@ const void *intel_microcode_find(void)
return NULL;
#endif
/* CPUID sets MSR 0x8B iff a microcode update has been loaded. */
/* CPUID sets MSR 0x8B if a microcode update has been loaded. */
msr.lo = 0;
msr.hi = 0;
wrmsr(0x8B, msr);
wrmsr(IA32_BIOS_SIGN_ID, msr);
eax = cpuid_eax(1);
msr = rdmsr(0x8B);
msr = rdmsr(IA32_BIOS_SIGN_ID);
rev = msr.hi;
x86_model = (eax >> 4) & 0x0f;
x86_family = (eax >> 8) & 0x0f;
@@ -171,7 +171,7 @@ const void *intel_microcode_find(void)
pf = 0;
if ((x86_model >= 5) || (x86_family > 6)) {
msr = rdmsr(0x17);
msr = rdmsr(IA32_PLATFORM_ID);
pf = 1 << ((msr.hi >> 18) & 7);
}
#if !defined(__ROMCC__)