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@@ -1,110 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2019 System76.
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* Copyright (C) 2017-2018 Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <console/console.h>
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#include <device/device.h>
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#include <device/pci.h>
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#include <device/pciexp.h>
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#include <device/pci_def.h>
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#include <device/pci_ids.h>
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#include <device/pci_ops.h>
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static void slot_dev_read_resources(struct device *dev)
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{
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struct resource *resource;
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// Add 256 MiB of memory space
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resource = new_resource(dev, 0x10);
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resource->size = 1 << 28;
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resource->align = 22;
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resource->gran = 22;
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resource->limit = 0xffffffff;
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resource->flags |= IORESOURCE_MEM;
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// Add 256 MiB of prefetchable memory space
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resource = new_resource(dev, 0x14);
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resource->size = 1 << 28;
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resource->align = 22;
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resource->gran = 22;
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resource->limit = 0xffffffff;
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resource->flags |= IORESOURCE_MEM | IORESOURCE_PREFETCH;
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// Add 8 KiB of I/O space
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resource = new_resource(dev, 0x18);
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resource->size = 1 << 13;
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resource->align = 12;
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resource->gran = 12;
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resource->limit = 0xffff;
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resource->flags |= IORESOURCE_IO;
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}
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static struct device_operations slot_dev_ops = {
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.read_resources = slot_dev_read_resources,
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};
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static bool tbt_is_hotplug_bridge(struct device *dev) {
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return PCI_SLOT(dev->path.pci.devfn) == 1;
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}
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static void tbt_pciexp_scan_bridge(struct device *dev) {
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printk(BIOS_DEBUG, "%s: %s: scan bridge\n", __func__, dev_path(dev));
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bool is_hotplug = tbt_is_hotplug_bridge(dev);
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if (is_hotplug) {
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/* Add hotplug buses, must happen before bus scan */
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printk(BIOS_DEBUG, "%s: %s: add hotplug buses\n", __func__, dev_path(dev));
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dev->hotplug_buses = 32;
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}
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/* Normal PCIe Scan */
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pciexp_scan_bridge(dev);
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if (is_hotplug) {
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/* Add dummy slot to preserve resources, must happen after bus scan */
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printk(BIOS_DEBUG, "%s: %s: add dummy device\n", __func__, dev_path(dev));
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struct device *slot;
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struct device_path slot_path = { .type = DEVICE_PATH_NONE };
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slot = alloc_dev(dev->link_list, &slot_path);
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slot->ops = &slot_dev_ops;
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}
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}
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static struct pci_operations pcie_ops = {
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.set_subsystem = pci_dev_set_subsystem,
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};
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static struct device_operations device_ops = {
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.read_resources = pci_bus_read_resources,
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.set_resources = pci_dev_set_resources,
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.enable_resources = pci_bus_enable_resources,
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.init = 0,
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.scan_bus = tbt_pciexp_scan_bridge,
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.enable = 0,
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.reset_bus = pci_bus_reset,
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.ops_pci = &pcie_ops,
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};
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static const unsigned short pcie_device_ids[] = {
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// JHL7540 Thunderbolt 3 Bridge
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0x15e7,
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0
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};
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static const struct pci_driver tbt_pcie __pci_driver = {
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.ops = &device_ops,
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.vendor = PCI_VENDOR_ID_INTEL,
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.devices = pcie_device_ids,
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};
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Jeremy Soller