vendorcode/amd/opensil: Add SATA configuration

For now, we'll use a hard-coded SATA controller configuration that
should work in most cases instead of making everything configurable via
devicetree settings.

In the process of scrubbing opensil for public release SATA became non
functional.

Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Change-Id: Ib37a081c0be4fdd2785e1dca70f376b967ce4462
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76518
Reviewed-by: Varshit Pandya <pandyavarshit@gmail.com>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Arthur Heymans
2023-07-14 20:11:15 +02:00
committed by Felix Held
parent 21be665c9a
commit 62389ab04a

View File

@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <FCH/Common/FchCommonCfg.h>
#include <FCH/Common/FchCore/FchSata/FchSata.h>
#include <RcMgr/DfX/RcManager4-api.h>
#include <amdblocks/reset.h>
#include <bootstate.h>
@@ -92,6 +93,24 @@ static void configure_usb(void)
sizeof(fch_usb_data->OemUsbConfigurationTable.S1Usb31PhyPort));
}
#define NUM_SATA_CONTROLLERS 4
static void configure_sata(void)
{
FCHSATA_INPUT_BLK *fch_sata_data = SilFindStructure(SilId_FchSata, 0);
FCH_SATA2 *fch_sata_defaults = GetFchSataData();
for (int i = 0; i < NUM_SATA_CONTROLLERS; i++) {
fch_sata_data[i] = fch_sata_defaults[i];
fch_sata_data[i].SataSetMaxGen2 = false;
fch_sata_data[i].SataMsiEnable = true;
fch_sata_data[i].SataEspPort = 0xFF;
fch_sata_data[i].SataRasSupport = true;
fch_sata_data[i].SataDevSlpPort1Num = 1;
fch_sata_data[i].SataMsiEnable = true;
fch_sata_data[i].SataControllerAutoShutdown = true;
fch_sata_data[i].SataRxPolarity = 0xFF;
}
}
static void setup_opensil(void *unused)
{
const SIL_STATUS debug_ret = SilDebugSetup(HostDebugService);
@@ -105,6 +124,7 @@ static void setup_opensil(void *unused)
setup_rc_manager_default();
configure_usb();
configure_sata();
}
BOOT_STATE_INIT_ENTRY(BS_DEV_INIT_CHIPS, BS_ON_ENTRY, setup_opensil, NULL);