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soc/intel/tigerlake: Drop unused PCH_DEV_SLOT_LPC macro

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This patch drops the unused `PCH_DEV_SLOT_LPC` macro from the
Tiger Lake SoC PCI device list.

BUG=none
TEST=Able to build and boot volteer, google board.

Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I27a2f31aa706c4d76e9f0db202422bc129368959
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64588
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
This commit is contained in:
Subrata Banik
2022-05-23 12:07:32 +05:30
parent f4ba356420
commit 6299cecb0d
1 changed files with 0 additions and 1 deletions
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1
src/soc/intel/tigerlake/include/soc/pci_devs.h
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@ -210,7 +210,6 @@
#define PCH_DEV_GSPI1 _PCH_DEV(SIO5, 3)
#define PCH_DEV_SLOT_ESPI 0x1f
#define PCH_DEV_SLOT_LPC PCH_DEV_SLOT_ESPI
#define PCH_DEVFN_ESPI _PCH_DEVFN(ESPI, 0)
#define PCH_DEVFN_P2SB _PCH_DEVFN(ESPI, 1)
#define PCH_DEVFN_PMC _PCH_DEVFN(ESPI, 2)