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common/block/tcss: Add config for PDC<->PMC mux configuration

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Introduce a new Kconfig to enable PD controller to PMC mux
configuration. Selecting this config enables direct communication from
PDC to PMC. TCSS_HAS_USBC_OPS enables USB-C operations via the EC. When
SOC_INTEL_TCSS_USE_PDC_PMC_USBC_MUX_CONFIGURATION is selected, disable
TCSS_HAS_USBC_OPS to avoid sending PMC commands from AP/EC.

BUG=b:332383540
TEST=USB3 plugged during G3, is detected after system boots from G3.

Cq-Depend: chromium:5484387
Cq-Depend: chrome-internal:7106592
Change-Id: Ieeb503393418cdad43384be39ac49c93ba91e4db
Signed-off-by: Krishna Prasad Bhat <krishna.p.bhat.d@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82077
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Krishna Prasad Bhat
2024-04-24 11:51:59 +05:30
committed by Felix Held
parent 4fa8354216
commit 653ba223df
1 changed files with 9 additions and 1 deletions
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10
src/soc/intel/common/block/tcss/Kconfig
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@@ -6,10 +6,18 @@ config SOC_INTEL_COMMON_BLOCK_TCSS
help
Sets up USB2/3 port mapping in TCSS MUX
config SOC_INTEL_TCSS_USE_PDC_PMC_USBC_MUX_CONFIGURATION
def_bool n
help
TCSS uses PDC<->PMC communication to perform mux configuration. When this config is
enabled, communication happens directly between PDC and PMC. Avoid sending PMC
commands from AP/EC.
config TCSS_HAS_USBC_OPS
bool "Enable USB-C MUX operations via the EC"
default y if EC_GOOGLE_CHROMEEC
depends on SOC_INTEL_COMMON_BLOCK_TCSS
depends on SOC_INTEL_COMMON_BLOCK_TCSS && \
!SOC_INTEL_TCSS_USE_PDC_PMC_USBC_MUX_CONFIGURATION
help
Enable USB-C operations via the EC. Requires `usbc_get_ops` to control features
such as HPD and DP Mode entry. Currently, only the ChromeEC implements this, see