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AGESA,binaryPI: Move PORT80 selection to C bootblock

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Because the function is implemented in C, post_code() calls
from cache_as_ram.S and other early assembly entry files may
not currently work for cold boots. Assembly implementation
needs to follow one day.

This effectively removes PORT80 routing from boards with
ROMCC_BOOTBLOCK.

Change-Id: I71aa94b33bd6f65e243724810472a440e98e0750
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37451
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
This commit is contained in:
Kyösti Mälkki
2019-12-03 12:36:09 +02:00
parent dafc78bb8d
commit 657d68bddc
40 changed files with 32 additions and 47 deletions
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5
src/southbridge/amd/agesa/hudson/bootblock.c
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@@ -77,6 +77,11 @@ void bootblock_soc_early_init(void)
hudson_lpc_decode();
enable_acpimmio_decode_pm24();
if (CONFIG(POST_DEVICE_PCI_PCIE))
hudson_pci_port80();
else if (CONFIG(POST_DEVICE_LPC))
hudson_lpc_port80();
dev = PCI_DEV(0, 0x14, 3);
data = pci_read_config32(dev, LPC_IO_OR_MEM_DECODE_ENABLE);
/* enable 0x2e/0x4e IO decoding for SuperIO */