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soc/amd/sabrina/makefile: drop multilevel option in amdfwtool calls

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Since Sabrina uses the image slot header (ISH) that depends on the AMD
A/B recovery scheme that depends on the multi-level PSP directory
support, the multi-level support gets automatically selected by passing
Sabrina as SoC name to amdfwtool, so passing the --multilevel command
line switch to amdfwtool isn't needed.

TEST=Timeless build results in identical binary for chausie

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I98154d5b47daca6ae7952ffd3175d98ea3e01845
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63235
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
This commit is contained in:
Felix Held
2022-03-30 19:39:06 +02:00
parent ed32977a39
commit 65c0655881
1 changed files with 0 additions and 3 deletions
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3
src/soc/amd/sabrina/Makefile.inc
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@@ -232,7 +232,6 @@ $(obj)/amdfw.rom: $(call strip_quotes, $(PSP_BIOSBIN_FILE)) \
$(OPT_VERSTAGE_FILE) \
$(OPT_VERSTAGE_SIG_FILE) \
--location $(shell printf "%#x" $(SABRINA_FWM_POSITION)) \
--multilevel \
--output $@
$(PSP_BIOSBIN_FILE): $(PSP_ELF_FILE) $(AMDCOMPRESS)
@@ -250,7 +249,6 @@ $(obj)/amdfw_a.rom: $(obj)/amdfw.rom
$(OPT_APOB_NV_BASE) \
--location $(shell printf "%#x" $(SABRINA_FW_A_POSITION)) \
--anywhere \
--multilevel \
--output $@
$(obj)/amdfw_b.rom: $(obj)/amdfw.rom
@@ -262,7 +260,6 @@ $(obj)/amdfw_b.rom: $(obj)/amdfw.rom
$(OPT_APOB_NV_BASE) \
--location $(shell printf "%#x" $(SABRINA_FW_B_POSITION)) \
--anywhere \
--multilevel \
--output $@