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mb/google/dedede/var/kracko: Disable un-used C1 port by daughterboard

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Probe C1 port in devicetree and disable un-used C1/A1 port by FW_CONFG.

BUG=b:339534479
BRANCH=firmware-dedede-13606.B
TEST=emerge-dedede coreboot chromeos-bootimage
flash and check boot log on DUT.

Change-Id: I944ff6f2fa712e7579ed1c9879f75835adc3ac4c
Signed-off-by: Robert Chen <robert.chen@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82263
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <ericllai@google.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
This commit is contained in:
Robert Chen 2024-05-08 22:05:21 -04:00 committed by Felix Held
parent 917bdbffd3
commit 67a96902d5
2 changed files with 34 additions and 0 deletions
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18
src/mainboard/google/dedede/variants/kracko/overridetree.cb
View File

@ -133,6 +133,15 @@ chip soc/intel/jasperlake
probe DB_PORTS DB_PORTS_1C_LTE
end
end
chip drivers/usb/acpi
register "desc" = ""Right Type-C Port""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "group" = "ACPI_PLD_GROUP(2, 1)"
device usb 2.1 on
probe DB_PORTS DB_PORTS_1C_1A
probe DB_PORTS DB_PORTS_1C_LTE
end
end
chip drivers/usb/acpi
register "desc" = ""Right Type-A Port""
register "type" = "UPC_TYPE_A"
@ -151,6 +160,15 @@ chip soc/intel/jasperlake
register "type" = "UPC_TYPE_INTERNAL"
device usb 2.6 on end
end
chip drivers/usb/acpi
register "desc" = ""Right Type-C Port""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "group" = "ACPI_PLD_GROUP(2, 1)"
device usb 3.1 on
probe DB_PORTS DB_PORTS_1C_1A
probe DB_PORTS DB_PORTS_1C_LTE
end
end
chip drivers/usb/acpi
register "desc" = ""LTE""
register "type" = "UPC_TYPE_INTERNAL"

16
src/mainboard/google/dedede/variants/kracko/ramstage.c
View File

@ -11,7 +11,23 @@ static void ext_vr_update(void)
cfg->disable_external_bypass_vr = 1;
}
static void usb_port_update(void)
{
struct soc_intel_jasperlake_config *cfg = config_of_soc();
if (fw_config_is_provisioned() &&
fw_config_probe(FW_CONFIG(DB_PORTS, DB_PORTS_NONE))) {
/* Disable USB C1 port */
cfg->usb2_ports[1].enable = 0;
cfg->usb3_ports[1].enable = 0;
/* Disable USB A1 port */
cfg->usb2_ports[3].enable = 0;
cfg->usb3_ports[3].enable = 0;
}
}
void variant_devtree_update(void)
{
ext_vr_update();
usb_port_update();
}