Revert "rpl: Switch to S0iX"

This reverts commit e0bf2e4691.
This commit is contained in:
Jeremy Soller
2023-02-24 15:15:01 -07:00
parent 5263effa38
commit 69353f4094
2 changed files with 2 additions and 2 deletions

View File

@@ -6,6 +6,7 @@ config BOARD_SYSTEM76_RPL_COMMON
select DRIVERS_INTEL_USB4_RETIMER select DRIVERS_INTEL_USB4_RETIMER
select EC_SYSTEM76_EC select EC_SYSTEM76_EC
select HAVE_ACPI_TABLES select HAVE_ACPI_TABLES
select HAVE_ACPI_RESUME
select HAVE_CMOS_DEFAULT select HAVE_CMOS_DEFAULT
select HAVE_OPTION_TABLE select HAVE_OPTION_TABLE
select INTEL_GMA_HAVE_VBT select INTEL_GMA_HAVE_VBT
@@ -13,6 +14,7 @@ config BOARD_SYSTEM76_RPL_COMMON
select MAINBOARD_HAS_TPM2 select MAINBOARD_HAS_TPM2
select MEMORY_MAPPED_TPM select MEMORY_MAPPED_TPM
select NO_UART_ON_SUPERIO select NO_UART_ON_SUPERIO
select SOC_INTEL_ALDERLAKE_S3
select SOC_INTEL_COMMON_BLOCK_HDA_VERB select SOC_INTEL_COMMON_BLOCK_HDA_VERB
select SOC_INTEL_COMMON_BLOCK_TCSS select SOC_INTEL_COMMON_BLOCK_TCSS
select SOC_INTEL_COMMON_BLOCK_USB4 select SOC_INTEL_COMMON_BLOCK_USB4

View File

@@ -11,8 +11,6 @@ chip soc/intel/alderlake
# Enable Enhanced Intel SpeedStep # Enable Enhanced Intel SpeedStep
register "eist_enable" = "1" register "eist_enable" = "1"
register "s0ix_enable" = "1"
# Enable C6 DRAM # Enable C6 DRAM
register "enable_c6dram" = "1" register "enable_c6dram" = "1"