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cpu/intel/model_206ax/acpi.c: Do not report P_BLK

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IO MWAIT redirection is disabled, which means reads to the P_LVL2 and
P_LVL3 "registers" will never produce any C-state transition requests.
Moreover, the register resource descriptors for all reported C-states
use the FFixedHW address space, not I/O.

Change-Id: I026835dd24d7ac1e1bae2d851e011e1670abaad4
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55215
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
This commit is contained in:
Angel Pons
2021-06-04 12:13:40 +02:00
committed by Werner Zeh
parent 151d561ddd
commit 6e7f9d6824
1 changed files with 2 additions and 8 deletions
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10
src/cpu/intel/model_206ax/acpi.c
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@ -306,7 +306,7 @@ static void generate_P_state_entries(int core, int cores_per_package)
void generate_cpu_entries(const struct device *device)
{
int coreID, cpuID, pcontrol_blk = PMB0_BASE, plen = 6;
int coreID, cpuID;
int totalcores = dev_count_cpu();
int cores_per_package = get_logical_cores_per_package();
int numcpus = totalcores/cores_per_package;
@ -316,15 +316,9 @@ void generate_cpu_entries(const struct device *device)
for (cpuID = 1; cpuID <= numcpus; cpuID++) {
for (coreID = 1; coreID <= cores_per_package; coreID++) {
if (coreID > 1) {
pcontrol_blk = 0;
plen = 0;
}
/* Generate processor \_SB.CPUx */
acpigen_write_processor(
(cpuID-1)*cores_per_package+coreID-1,
pcontrol_blk, plen);
(cpuID-1)*cores_per_package+coreID-1, 0, 0);
/* Generate P-state tables */
generate_P_state_entries(