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soc/intel/meteoerlake: Add power limits for 2+4 15W SOC SKU

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This commit adds power limit settings for 2+4 15w SOC sku and renames
MTL_P_282_CORE to MTL_P_282_242_CORE since they are sharing same 15w
settings.

BUG=b:306543967
TEST=boot on rex with 2+4 SOC and power limit settings are correct

Change-Id: Id738303d1652f964142f8f27110426d6b84609bf
Signed-off-by: Kane Chen <kane.chen@intel.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78495
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: David Wu <david_wu@quanta.corp-partner.google.com>
Reviewed-by: Jamie Ryu <jamie.m.ryu@intel.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Kane Chen 2023-10-20 22:09:57 +08:00 committed by Matt DeVillier
parent d4bf7211ca
commit 6feb1de20a
2 changed files with 4 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
src/soc/intel/meteorlake/chip.h
View File

@ -23,7 +23,7 @@
/* Types of different SKUs */
enum soc_intel_meteorlake_power_limits {
MTL_P_282_CORE,
MTL_P_282_242_CORE,
MTL_P_682_CORE,
MTL_POWER_LIMITS_COUNT
};
@ -40,7 +40,8 @@ static const struct {
enum soc_intel_meteorlake_power_limits limits;
enum soc_intel_meteorlake_cpu_tdps cpu_tdp;
} cpuid_to_mtl[] = {
{ PCI_DID_INTEL_MTL_P_ID_2, MTL_P_282_CORE, TDP_15W },
{ PCI_DID_INTEL_MTL_P_ID_5, MTL_P_282_242_CORE, TDP_15W },
{ PCI_DID_INTEL_MTL_P_ID_2, MTL_P_282_242_CORE, TDP_15W },
{ PCI_DID_INTEL_MTL_P_ID_1, MTL_P_682_CORE, TDP_28W },
};

2
src/soc/intel/meteorlake/chipset.cb
View File

@ -2,7 +2,7 @@ chip soc/intel/meteorlake
device cpu_cluster 0 on end
register "power_limits_config[MTL_P_282_CORE]" = "{
register "power_limits_config[MTL_P_282_242_CORE]" = "{
.tdp_pl1_override = 15,
.tdp_pl2_override = 57,
.tdp_pl4 = 114,