AMD fam10 ACPI: Use common fixed sleepstates.asl
SSFG was meant to be used as a mask to enable sleepstates _S1 thru _S4. However as a logical instead of bitwise 'and' operation was used, all the states were enabled if only one was marked available. Note that all boards incorrectly had SSFG == 0x0D that previously enabled ACPI S3 sleep state even when it was not available. Change-Id: Ia948becff079383cbf861468da9e8a3ebbf213cb Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/21093 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
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@@ -35,8 +35,6 @@ DefinitionBlock (
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Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS) /* Base address of PCIe config space */
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Name(HPBA, 0xFED00000) /* Base address of HPET table */
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Name(SSFG, 0x0D) /* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
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/* USB overcurrent mapping pins. */
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Name(UOM0, 0)
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Name(UOM1, 2)
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@@ -801,27 +799,7 @@ DefinitionBlock (
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} /* End Scope(_SB) */
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/* Supported sleep states: */
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Name(\_S0, Package () {0x00, 0x00, 0x00, 0x00} ) /* (S0) - working state */
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If (LAnd(SSFG, 0x01)) {
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Name(\_S1, Package () {0x01, 0x01, 0x00, 0x00} ) /* (S1) - sleeping w/CPU context */
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}
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If (LAnd(SSFG, 0x02)) {
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Name(\_S2, Package () {0x02, 0x02, 0x00, 0x00} ) /* (S2) - "light" Suspend to RAM */
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}
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If (LAnd(SSFG, 0x04)) {
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Name(\_S3, Package () {0x03, 0x03, 0x00, 0x00} ) /* (S3) - Suspend to RAM */
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}
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If (LAnd(SSFG, 0x08)) {
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Name(\_S4, Package () {0x04, 0x04, 0x00, 0x00} ) /* (S4) - Suspend to Disk */
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}
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Name(\_S5, Package () {0x05, 0x05, 0x00, 0x00} ) /* (S5) - Soft Off */
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Name(\_SB.CSPS ,0) /* Current Sleep State (S0, S1, S2, S3, S4, S5) */
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Name(CSMS, 0) /* Current System State */
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#include <southbridge/amd/common/acpi/sleepstates.asl>
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/* Wake status package */
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Name(WKST,Package(){Zero, Zero})
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