mb/google/hatch/var/jinlon: Ensure LCD backlight controls generated
Jinlon disables the eps device if no privacy screen is present, so add a second generic gfx device 'no_eps' to handle that case, so that ACPI backlight controls are generated either way. Add logic to ensure only one of the two devices is active. TEST=build/boot Win11 on google/hatch (jinlon), ensure LCD backlight controls present and functional on device both with and without a privacy screen. Change-Id: Icf20de97d26c8be76c84e87d5dc6ed1a4b6dbfbc Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/80178 Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de> Reviewed-by: Eric Lai <ericllai@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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committed by
Felix Singer
parent
f6d8efd4ac
commit
73cc08afa6
@ -21,9 +21,11 @@ static bool eps_sku(uint32_t sku_id)
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static void check_for_eps(uint32_t sku_id)
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{
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struct device *eps_dev = DEV_PTR(eps);
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struct device *no_eps_dev = DEV_PTR(no_eps);
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if (eps_sku(sku_id)) {
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printk(BIOS_INFO, "SKU ID %u has EPS\n", sku_id);
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no_eps_dev->enabled = 0;
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return;
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}
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@ -70,7 +70,6 @@ chip soc/intel/cannonlake
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device domain 0 on
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device ref igpu on
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register "gfx" = "GMA_DEFAULT_PANEL(0)"
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chip drivers/gfx/generic
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register "device_count" = "1"
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register "device[0].name" = ""LCD0""
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@ -82,6 +81,13 @@ chip soc/intel/cannonlake
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register "device[0].privacy.gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E0)"
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device generic 0 alias eps on end
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end
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chip drivers/gfx/generic
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register "device_count" = "1"
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register "device[0].name" = ""LCD0""
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# Internal panel on the first port of the graphics chip
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register "device[0].addr" = "0x80010400"
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device generic 1 alias no_eps on end
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end
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end
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device ref xhci on
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chip drivers/usb/acpi
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