mb/google/hatch/var/jinlon: Ensure LCD backlight controls generated

Jinlon disables the eps device if no privacy screen is present, so add
a second generic gfx device 'no_eps' to handle that case, so that ACPI
backlight controls are generated either way. Add logic to ensure only
one of the two devices is active.

TEST=build/boot Win11 on google/hatch (jinlon), ensure LCD backlight
controls present and functional on device both with and without a
privacy screen.

Change-Id: Icf20de97d26c8be76c84e87d5dc6ed1a4b6dbfbc
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80178
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Reviewed-by: Eric Lai <ericllai@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Matt DeVillier
2024-01-19 20:51:24 -06:00
committed by Felix Singer
parent f6d8efd4ac
commit 73cc08afa6
2 changed files with 9 additions and 1 deletions

View File

@ -21,9 +21,11 @@ static bool eps_sku(uint32_t sku_id)
static void check_for_eps(uint32_t sku_id)
{
struct device *eps_dev = DEV_PTR(eps);
struct device *no_eps_dev = DEV_PTR(no_eps);
if (eps_sku(sku_id)) {
printk(BIOS_INFO, "SKU ID %u has EPS\n", sku_id);
no_eps_dev->enabled = 0;
return;
}

View File

@ -70,7 +70,6 @@ chip soc/intel/cannonlake
device domain 0 on
device ref igpu on
register "gfx" = "GMA_DEFAULT_PANEL(0)"
chip drivers/gfx/generic
register "device_count" = "1"
register "device[0].name" = ""LCD0""
@ -82,6 +81,13 @@ chip soc/intel/cannonlake
register "device[0].privacy.gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E0)"
device generic 0 alias eps on end
end
chip drivers/gfx/generic
register "device_count" = "1"
register "device[0].name" = ""LCD0""
# Internal panel on the first port of the graphics chip
register "device[0].addr" = "0x80010400"
device generic 1 alias no_eps on end
end
end
device ref xhci on
chip drivers/usb/acpi