Change Geode GX2 to use the auto DRAM detect code from Geode LX.
Also, change the GX2 boards to use it. Add a processor speed setting function in human readable MHz and remove the useless and broken PLLMSR settings (the processor speed was hardcoded to 366MHz in pll_reset.c). Signed-off-by: Nils Jacobs <njacobs8@hetnet.nl> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6011 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@@ -413,6 +413,13 @@
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#define AES_GLD_MSR_PM (MSR_AES + 0x2004)
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#define AES_CONTROL (MSR_AES + 0x2006)
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/* from MC spec */
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#define MIN_MOD_BANKS 1
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#define MAX_MOD_BANKS 2
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#define MIN_DEV_BANKS 2
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#define MAX_DEV_BANKS 4
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#define MAX_COL_ADDR 17
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/* more fun stuff */
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#define BM 1 /* Base Mask - map power of 2 size aligned region */
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#define BMO 2 /* BM with an offset */
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