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mb/google/brask/variants/moli: set tcc_offset to 0℃

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Set tcc_offset value to 0 in devicetree for Thermal Control Circuit
(TCC) activation feature. This value is suggested by Thermal team.

BUG=b:236294162
TEST=emerge-brask coreboot

Signed-off-by: Raihow Shi <raihow_shi@wistron.corp-partner.google.com>
Change-Id: I8d4c631e07873923226683c8aa0cf36cb872e2d4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65448
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
This commit is contained in:
Raihow Shi
2022-06-27 13:20:47 +08:00
committed by Felix Held
parent fa7970aa81
commit 772ca3cc00
1 changed files with 1 additions and 0 deletions
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src/mainboard/google/brya/variants/moli/overridetree.cb
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@@ -27,6 +27,7 @@ chip soc/intel/alderlake
register "usb2_ports[3]" = "USB2_PORT_SHORT(OC_SKIP)" # Enable USB2 Port4
register "usb2_ports[8]" = "USB2_PORT_EMPTY" # Disable USB2 Port9
register "tcss_ports[3]" = "TCSS_PORT_EMPTY" # Disable TCP3
register "tcc_offset" = "0" # TCC of 100C
device domain 0 on
device ref tcss_dma0 on
chip drivers/intel/usb4/retimer