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mb/google/brox: Do not override GPIO PM

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Brox uses Ti50 which always supports long interrupt pulse. Hence no need
to override GPIO PM.

BUG=None
TEST=Build Brox firmware and boot to OS. Perform suspend/resume for 25
cycles.

Change-Id: I6a138c1953714bc29570db587594cab8f315a4ec
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83856
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Karthikeyan Ramasubramanian 2024-08-09 13:21:06 -06:00 committed by Felix Held
parent dfa830e530
commit 7a9528b688
1 changed files with 0 additions and 25 deletions
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25
src/mainboard/google/brox/mainboard.c
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@ -4,11 +4,9 @@
#include <baseboard/gpio.h>
#include <baseboard/variants.h>
#include <device/device.h>
#include <drivers/tpm/cr50.h>
#include <drivers/wwan/fm/chip.h>
#include <ec/ec.h>
#include <fw_config.h>
#include <security/tpm/tss.h>
#include <soc/gpio.h>
#include <soc/ramstage.h>
#include <stdio.h>
@ -34,29 +32,6 @@ static void mainboard_smbios_strings(struct device *dev, struct smbios_type11 *t
void mainboard_update_soc_chip_config(struct soc_intel_alderlake_config *config)
{
int ret;
ret = tlcl_lib_init();
if (ret != VB2_SUCCESS) {
printk(BIOS_ERR, "tlcl_lib_init() failed: 0x%x\n", ret);
return;
}
if (cr50_is_long_interrupt_pulse_enabled()) {
printk(BIOS_INFO, "Enabling GPIO PM b/c CR50 has long IRQ pulse support\n");
config->gpio_override_pm = 0;
} else {
printk(BIOS_INFO, "Disabling GPIO PM b/c CR50 does not have long IRQ pulse "
"support\n");
config->gpio_override_pm = 1;
config->gpio_pm[COMM_0] = 0;
config->gpio_pm[COMM_1] = 0;
config->gpio_pm[COMM_2] = 0;
config->gpio_pm[COMM_3] = 0;
config->gpio_pm[COMM_4] = 0;
config->gpio_pm[COMM_5] = 0;
}
variant_update_soc_chip_config(config);
}