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mb/google/hatch: Add a GPIO to enable/disable FPMCU power

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A FPMCU power-control pin (GPP_C11) is added to the latest
hatch reference schematic.

Even though this is not implemented in hatch rev1 board, the future
hatch family boards with FPMCU should all have this control pin.

On the old boards without this control pin, GPP_C11 is a floating TP,
and thus this patch should be backward-compatible.

BUG=b:130307667, b:135216932
TEST=build

Signed-off-by: Philip Chen <philipchen@google.com>
Change-Id: I6a84eeb6aab562258e749a8a5d09dadfa0e43587
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33655
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Philip Chen 2019-06-20 18:05:28 -07:00 committed by Furquan Shaikh
parent 6f7f39e96b
commit 80604cdf03
1 changed files with 2 additions and 2 deletions
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4
src/mainboard/google/hatch/variants/baseboard/gpio.c
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@ -139,8 +139,8 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_NF(GPP_C9, NONE, DEEP, NF1),
/* C10 : GPP_10 ==> GPP_C10_TP */
PAD_NC(GPP_C10, NONE),
/* C11 : GPP_11 ==> GPP_C11_TP */
PAD_NC(GPP_C11, NONE),
/* C11 : GPP_11 ==> EN_FP_RAILS */
PAD_CFG_GPO(GPP_C11, 1, DEEP),
/* C12 : GPP_C12 ==> NC */
PAD_NC(GPP_C12, NONE),
/* C13 : EC_PCH_INT_L