soc/intel/apollolake: Make SCI configurable

The System Control Interrupt is routed per default to IRQ 9. Some
mainboards use IRQ 9 for different purpose. Therefore it is necessary to
make the SCI configurable on Apollo Lake.

Change-Id: Ib4a7ce7d68a6f1f16f27d0902d83dc8774e785b1
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/21584
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

src/soc/intel/apollolake/chip.h

@@ -2,6 +2,7 @@
  * This file is part of the coreboot project.
  *
  * Copyright (C) 2015 Intel Corp.
+ * Copyright 2017 Siemens AG.
  * (Written by Alexandru Gagniuc <alexandrux.gagniuc@intel.com> for Intel Corp.)
  *
  * This program is free software; you can redistribute it and/or modify
@@ -78,6 +79,9 @@ struct soc_intel_apollolake_config {
 	 */
 	uint32_t emmc_rx_cmd_data_cntl2;
 
+	/* Specifies on which IRQ the SCI will internally appear. */
+	uint8_t sci_irq;
+
 	/* Configure serial IRQ (SERIRQ) line. */
 	enum serirq_mode serirq_mode;