soc/intel/common: Abstract the common TCSS functions
This change abstracts the common TCSS functions for pad configuration and Thunderbolt authentication. BUG=b:213574324 TEST=Build platforms coreboot images successfully. Change-Id: I3302aabfb5f540c41da6359f11376b4202c6310b Signed-off-by: John Zhao <john.zhao@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/62723 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Subrata Banik <subratabanik@google.com>
This commit is contained in:
@@ -92,7 +92,6 @@ config CPU_SPECIFIC_OPTIONS
|
||||
select SOC_INTEL_COMMON_BLOCK_SMM
|
||||
select SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP
|
||||
select SOC_INTEL_COMMON_BLOCK_TCSS
|
||||
select SOC_INTEL_COMMON_BLOCK_TCSS_REG_ACCESS_REGBAR
|
||||
select SOC_INTEL_COMMON_BLOCK_THERMAL_BEHIND_PMC
|
||||
select SOC_INTEL_COMMON_BLOCK_USB4
|
||||
select SOC_INTEL_COMMON_BLOCK_USB4_PCIE
|
||||
|
@@ -43,6 +43,7 @@ ramstage-y += reset.c
|
||||
ramstage-y += retimer.c
|
||||
ramstage-y += soundwire.c
|
||||
ramstage-y += systemagent.c
|
||||
ramstage-y += tcss.c
|
||||
ramstage-y += vr_config.c
|
||||
ramstage-y += xhci.c
|
||||
ramstage-$(CONFIG_SOC_INTEL_CRASHLOG) += crashlog.c
|
||||
|
8
src/soc/intel/alderlake/tcss.c
Normal file
8
src/soc/intel/alderlake/tcss.c
Normal file
@@ -0,0 +1,8 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
|
||||
#include <intelblocks/tcss.h>
|
||||
|
||||
const struct soc_tcss_ops tcss_ops = {
|
||||
.configure_aux_bias_pads = tcss_configure_aux_bias_pads_regbar,
|
||||
.valid_tbt_auth = tcss_valid_tbt_auth,
|
||||
};
|
@@ -137,12 +137,22 @@ struct typec_aux_bias_pads {
|
||||
gpio_t pad_auxp_dc;
|
||||
};
|
||||
|
||||
struct soc_tcss_ops {
|
||||
void (*configure_aux_bias_pads)(const struct typec_aux_bias_pads *pads);
|
||||
bool (*valid_tbt_auth)(void);
|
||||
};
|
||||
|
||||
extern const struct soc_tcss_ops tcss_ops;
|
||||
|
||||
/* Method to configure pads */
|
||||
void tcss_configure_aux_bias_pads_regbar(const struct typec_aux_bias_pads *pads);
|
||||
|
||||
/*
|
||||
* 1) Initialize TCSS muxes to disconnected state
|
||||
* 2) Configure GPIO pads to provide DC Bias on AUX signals
|
||||
* 3) Detect DP-over-Type-C alternate mode
|
||||
*/
|
||||
void tcss_configure(const struct typec_aux_bias_pads pads[MAX_TYPE_C_PORTS]);
|
||||
void tcss_configure(const struct typec_aux_bias_pads aux_bias_pads[MAX_TYPE_C_PORTS]);
|
||||
|
||||
/*
|
||||
* Method to get only the port information to initialize the muxes to
|
||||
@@ -152,6 +162,6 @@ void tcss_configure(const struct typec_aux_bias_pads pads[MAX_TYPE_C_PORTS]);
|
||||
const struct tcss_port_map *tcss_get_port_info(size_t *num_ports);
|
||||
|
||||
/* Method to validate the Thunderbolt authentication */
|
||||
uint32_t tcss_valid_tbt_auth(void);
|
||||
bool tcss_valid_tbt_auth(void);
|
||||
|
||||
#endif /* _TCSS_H_ */
|
||||
|
@@ -9,16 +9,3 @@ config ENABLE_TCSS_DISPLAY_DETECTION
|
||||
depends on SOC_INTEL_COMMON_BLOCK_TCSS && RUN_FSP_GOP
|
||||
help
|
||||
Enable displays to be detected over Type-C ports during boot.
|
||||
|
||||
config SOC_INTEL_COMMON_BLOCK_TCSS_REG_ACCESS_REGBAR
|
||||
def_bool n
|
||||
depends on SOC_INTEL_COMMON_BLOCK_TCSS
|
||||
help
|
||||
Enable TCSS registers access through REGBAR for platforms like
|
||||
Tiger Lake and Alder Lake
|
||||
|
||||
config SOC_INTEL_COMMON_BLOCK_TCSS_REG_ACCESS_SBI
|
||||
def_bool n
|
||||
depends on SOC_INTEL_COMMON_BLOCK_TCSS
|
||||
help
|
||||
Enable TCSS registers access through Sideband interface on applicable SoC platforms
|
||||
|
@@ -355,7 +355,7 @@ static uint32_t calc_bias_ctrl_reg_value(gpio_t pad)
|
||||
cpu_pid;
|
||||
}
|
||||
|
||||
static void tcss_configure_aux_bias_pads_regbar(
|
||||
void tcss_configure_aux_bias_pads_regbar(
|
||||
const struct typec_aux_bias_pads *pads)
|
||||
{
|
||||
for (size_t i = 0; i < MAX_TYPE_C_PORTS; i++) {
|
||||
@@ -368,16 +368,6 @@ static void tcss_configure_aux_bias_pads_regbar(
|
||||
}
|
||||
}
|
||||
|
||||
static void tcss_configure_aux_bias_pads(
|
||||
const struct typec_aux_bias_pads *pads)
|
||||
{
|
||||
if (CONFIG(SOC_INTEL_COMMON_BLOCK_TCSS_REG_ACCESS_REGBAR))
|
||||
tcss_configure_aux_bias_pads_regbar(pads);
|
||||
else
|
||||
printk(BIOS_ERR, "%s: Error: No TCSS configuration method is selected!\n",
|
||||
__func__);
|
||||
}
|
||||
|
||||
const struct tcss_port_map *tcss_get_port_info(size_t *num_ports)
|
||||
{
|
||||
static struct tcss_port_map port_map[MAX_TYPE_C_PORTS];
|
||||
@@ -423,19 +413,14 @@ void tcss_configure(const struct typec_aux_bias_pads aux_bias_pads[MAX_TYPE_C_PO
|
||||
tcss_init_mux(i, &port_map[i]);
|
||||
|
||||
/* This should be performed before alternate modes are entered */
|
||||
tcss_configure_aux_bias_pads(aux_bias_pads);
|
||||
if (tcss_ops.configure_aux_bias_pads)
|
||||
tcss_ops.configure_aux_bias_pads(aux_bias_pads);
|
||||
|
||||
if (CONFIG(ENABLE_TCSS_DISPLAY_DETECTION))
|
||||
tcss_configure_dp_mode(port_map, num_ports);
|
||||
}
|
||||
|
||||
uint32_t tcss_valid_tbt_auth(void)
|
||||
bool tcss_valid_tbt_auth(void)
|
||||
{
|
||||
if (CONFIG(SOC_INTEL_COMMON_BLOCK_TCSS_REG_ACCESS_REGBAR)) {
|
||||
return REGBAR32(PID_IOM, IOM_CSME_IMR_TBT_STATUS) & TBT_VALID_AUTHENTICATION;
|
||||
} else {
|
||||
printk(BIOS_ERR, "%s: Error: No validation for Thunderbolt authentication!\n",
|
||||
__func__);
|
||||
return 0;
|
||||
}
|
||||
return REGBAR32(PID_IOM, IOM_CSME_IMR_TBT_STATUS) & TBT_VALID_AUTHENTICATION;
|
||||
}
|
||||
|
@@ -29,7 +29,7 @@ static void tbt_dma_fill_ssdt(const struct device *dev)
|
||||
{
|
||||
struct acpi_dp *dsd, *pkg;
|
||||
|
||||
if (!tcss_valid_tbt_auth())
|
||||
if (tcss_ops.valid_tbt_auth && !tcss_ops.valid_tbt_auth())
|
||||
return;
|
||||
|
||||
acpigen_write_scope(acpi_device_path(dev));
|
||||
|
@@ -70,7 +70,6 @@ config CPU_SPECIFIC_OPTIONS
|
||||
select SOC_INTEL_COMMON_BLOCK_SMM
|
||||
select SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP
|
||||
select SOC_INTEL_COMMON_BLOCK_TCSS
|
||||
select SOC_INTEL_COMMON_BLOCK_TCSS_REG_ACCESS_REGBAR
|
||||
select SOC_INTEL_COMMON_BLOCK_USB4
|
||||
select SOC_INTEL_COMMON_BLOCK_USB4_PCIE
|
||||
select SOC_INTEL_COMMON_BLOCK_USB4_XHCI
|
||||
|
@@ -40,6 +40,7 @@ ramstage-y += reset.c
|
||||
ramstage-y += retimer.c
|
||||
ramstage-y += soundwire.c
|
||||
ramstage-y += systemagent.c
|
||||
ramstage-y += tcss.c
|
||||
ramstage-y += xhci.c
|
||||
ramstage-$(CONFIG_SOC_INTEL_CRASHLOG) += crashlog_lib.c
|
||||
|
||||
|
8
src/soc/intel/tigerlake/tcss.c
Normal file
8
src/soc/intel/tigerlake/tcss.c
Normal file
@@ -0,0 +1,8 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
|
||||
#include <intelblocks/tcss.h>
|
||||
|
||||
const struct soc_tcss_ops tcss_ops = {
|
||||
.configure_aux_bias_pads = tcss_configure_aux_bias_pads_regbar,
|
||||
.valid_tbt_auth = tcss_valid_tbt_auth,
|
||||
};
|
Reference in New Issue
Block a user