soc/intel/alderlake/{chipset.cb,chipset_pch_s.cb}: Set P2SB as hidden
Set the P2SB device as hidden as FSP-S is hiding the PCI configuration space from coreboot on Alder Lake systems. Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Change-Id: I5cfde7c1f6791578a03d73e89bcde31af608f12d
This commit is contained in:
committed by
Jeremy Soller
parent
09f9c48146
commit
84937d76fb
@@ -278,7 +278,7 @@ chip soc/intel/alderlake
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device pci 1e.2 alias gspi0 off end
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device pci 1e.2 alias gspi0 off end
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device pci 1e.3 alias gspi1 off end
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device pci 1e.3 alias gspi1 off end
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device pci 1f.0 alias pch_espi on end
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device pci 1f.0 alias pch_espi on end
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device pci 1f.1 alias p2sb off end
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device pci 1f.1 alias p2sb hidden end
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device pci 1f.2 alias pmc hidden end
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device pci 1f.2 alias pmc hidden end
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device pci 1f.3 alias hda off end
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device pci 1f.3 alias hda off end
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device pci 1f.4 alias smbus off end
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device pci 1f.4 alias smbus off end
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@@ -242,7 +242,7 @@ chip soc/intel/alderlake
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device pci 1e.2 alias gspi0 off end
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device pci 1e.2 alias gspi0 off end
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device pci 1e.3 alias gspi1 off end
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device pci 1e.3 alias gspi1 off end
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device pci 1f.0 alias pch_espi on end
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device pci 1f.0 alias pch_espi on end
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device pci 1f.1 alias p2sb off end
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device pci 1f.1 alias p2sb hidden end
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device pci 1f.2 alias pmc hidden end
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device pci 1f.2 alias pmc hidden end
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device pci 1f.3 alias hda off end
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device pci 1f.3 alias hda off end
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device pci 1f.4 alias smbus off end
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device pci 1f.4 alias smbus off end
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