mb/google/rex/var/deku: Update DPTF parameters
Adjust settings as recommended by thermal team. Update DPTF parameters based on b:308704811#comment4. BUG=b:308704811 BRANCH=firmware-rex-15709.B TEST=emerge-ovis coreboot chromeos-bootimage built bootleg and verified test result by thermal team Change-Id: I710682771bd0679ae4b44dd43be68f60e8984b2e Signed-off-by: Tony Huang <tony-huang@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/82434 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subratabanik@google.com> Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-by: Eric Lai <ericllai@google.com>
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@@ -70,6 +70,40 @@ chip soc/intel/meteorlake
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device domain 0 on
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device ref dtt on
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chip drivers/intel/dptf
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## sensor information
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register "options.tsr[0].desc" = ""DDR_SOC""
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register "options.tsr[1].desc" = ""Ambient""
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register "options.tsr[2].desc" = ""IMVP_SOC""
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register "options.tsr[3].desc" = ""NVME""
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## Passive Policy
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register "policies.passive" = "{
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[0] = DPTF_PASSIVE(CPU, CPU, 65, 1000),
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}"
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## Critical Policy
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register "policies.critical" = "{
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[0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN),
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}"
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## Power Limits Control
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register "controls.power_limits" = "{
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.pl1 = {
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.min_power = 28000,
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.max_power = 28000,
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.time_window_min = 28 * MSECS_PER_SEC,
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.time_window_max = 32 * MSECS_PER_SEC,
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.granularity = 200,
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},
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.pl2 = {
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.min_power = 64000,
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.max_power = 64000,
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.time_window_min = 28 * MSECS_PER_SEC,
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.time_window_max = 32 * MSECS_PER_SEC,
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.granularity = 1000,
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}
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}"
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device generic 0 alias dptf_policy on end
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end
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end
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