mb/google/nissa/var/pujjoga: Modify P sensor setting

1. The P sensor need follow WWAN FW_CONFIG to enable/disable

2. Modify GPP_H19 setting to PAD_CFG_GPI_APIC to fix PLT test fail

Schematic version: 500E_GEN4S_ADL_N_MB_0418

BUG=b:357998089
TEST=1. Boot to OS and verify the P sensor devices is set based on
fw_config.
2. Confirm that the PLT test can pass successfully.

Change-Id: Ic3610180c8cf99eba9367e26bfc3666410af19f7
Signed-off-by: Leo Chou <leo.chou@lcfc.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83794
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>

src/mainboard/google/brya/variants/pujjoga/gpio.c

@@ -45,7 +45,7 @@ static const struct pad_config override_gpio_table[] = {
 	/* H17  : DDPB_CTRLDATA */
 	PAD_CFG_NF(GPP_H17, NONE, DEEP, NF1),
 	/* H19 : SOC_I2C_SUB_INT_ODL */
-	PAD_CFG_GPI_LOCK(GPP_H19, NONE, LOCK_CONFIG),
+	PAD_CFG_GPI_APIC(GPP_H19, NONE, PLTRST, LEVEL, NONE),
 	/* H21  : WWAN_PERST_L */
 	PAD_NC_LOCK(GPP_H21, NONE, LOCK_CONFIG),
 	/* H22  : WCAM_MCLK_R ==> NC */

src/mainboard/google/brya/variants/pujjoga/overridetree.cb

@@ -303,7 +303,9 @@ chip soc/intel/alderlake
 				register "int_comp_resistor" = ""lowest""
 				register "input_precharge_resistor_ohms" = "4000"
 				register "input_analog_gain" = "1"
-				device i2c 28 on end
+				device i2c 28 on
+					probe WWAN LTE_PRESENT
+				end
 			end
 		end
 		device ref i2c3 on