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Update gpe config

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This commit is contained in:
Jeremy Soller
2019-06-20 15:58:29 -06:00
parent d1e6a842c7
commit 87e186e7a8
1 changed files with 1 additions and 1 deletions
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src/mainboard/system76/cfl-h/devicetree.cb
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@@ -177,7 +177,7 @@ chip soc/intel/cannonlake
# offset bits also need to be changed. # offset bits also need to be changed.
# sudo devmem2 0xfe001920 (pmc_bar + GPIO_GPE_CFG) # sudo devmem2 0xfe001920 (pmc_bar + GPIO_GPE_CFG)
register "gpe0_dw0" = "PMC_GPP_K" register "gpe0_dw0" = "PMC_GPP_K"
register "gpe0_dw1" = "PMC_GPP_D" register "gpe0_dw1" = "PMC_GPP_G"
register "gpe0_dw2" = "PMC_GPP_E" register "gpe0_dw2" = "PMC_GPP_E"
# Actual device tree # Actual device tree