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Add ACPI backlight code

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Change-Id: I325fb544e2f2fa06606fd02138b95b236782fdbf
This commit is contained in:
Jeremy Soller
2020-06-11 09:51:40 -06:00
committed by Jeremy Soller
parent bc3e31005d
commit 8a580cb7a7
23 changed files with 210 additions and 2 deletions
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2
src/drivers/intel/gma/acpi/configure_brightness_levels.asl
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@@ -148,7 +148,7 @@
{
If (LEqual(^BOX3.XBCM (Arg0), Ones))
{
^LEGA.XBCM (Arg0)
//TODO: fix Windows initial setup ^LEGA.XBCM (Arg0)
}
}

32
src/mainboard/system76/cml-u/acpi/backlight.asl Normal file
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@@ -0,0 +1,32 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <drivers/intel/gma/acpi/gma.asl>
Scope (GFX0)
{
Name (BRIG, Package (22)
{
40, /* default AC */
40, /* default Battery */
5,
10,
15,
20,
25,
30,
35,
40,
45,
50,
55,
60,
65,
70,
75,
80,
85,
90,
95,
100
})
}

4
src/mainboard/system76/cml-u/acpi/ec.asl
View File

@@ -39,6 +39,10 @@ Device (EC0)
^^^^BAT0.UPBI()
^^^^BAT0.UPBS()
// Notify of changes
Notify(^^^^AC, Zero)
Notify(^^^^BAT0, Zero)
PNOT ()
// EC is now available

3
src/mainboard/system76/cml-u/devicetree.cb
View File

@@ -169,6 +169,9 @@ chip soc/intel/cannonlake
# Serial IRQ Continuous
register "serirq_mode" = "SERIRQ_CONTINUOUS"
# Graphics (soc/intel/cannonlake/graphics.c)
register "gfx" = "GMA_STATIC_DISPLAYS(0)"
# LPC (soc/intel/cannonlake/lpc.c)
# LPC configuration from lspci -s 1f.0 -xxx
# Address 0x84: Decode 0x80 - 0x8F (Port 80)

1
src/mainboard/system76/cml-u/dsdt.asl
View File

@@ -18,6 +18,7 @@ DefinitionBlock(
{
#include <soc/intel/common/block/acpi/acpi/northbridge.asl>
#include <soc/intel/cannonlake/acpi/southbridge.asl>
#include "acpi/backlight.asl"
}
#include <southbridge/intel/common/acpi/sleepstates.asl>

32
src/mainboard/system76/gaze15/acpi/backlight.asl Normal file
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@@ -0,0 +1,32 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <drivers/intel/gma/acpi/gma.asl>
Scope (GFX0)
{
Name (BRIG, Package (22)
{
40, /* default AC */
40, /* default Battery */
5,
10,
15,
20,
25,
30,
35,
40,
45,
50,
55,
60,
65,
70,
75,
80,
85,
90,
95,
100
})
}

3
src/mainboard/system76/gaze15/devicetree.cb
View File

@@ -189,6 +189,9 @@ chip soc/intel/cannonlake
# Serial IRQ Continuous
register "serirq_mode" = "SERIRQ_CONTINUOUS"
# Graphics (soc/intel/cannonlake/graphics.c)
register "gfx" = "GMA_STATIC_DISPLAYS(0)"
# LPC (soc/intel/cannonlake/lpc.c)
# LPC configuration from lspci -s 1f.0 -xxx
# Address 0x84: Decode 0x80 - 0x8F (Port 80)

1
src/mainboard/system76/gaze15/dsdt.asl
View File

@@ -18,6 +18,7 @@ DefinitionBlock(
{
#include <soc/intel/common/block/acpi/acpi/northbridge.asl>
#include <soc/intel/cannonlake/acpi/southbridge.asl>
#include "acpi/backlight.asl"
#include "acpi/pegp.asl"
#include "acpi/dgpu.asl"
}

32
src/mainboard/system76/lemp9/acpi/backlight.asl Normal file
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@@ -0,0 +1,32 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <drivers/intel/gma/acpi/gma.asl>
Scope (GFX0)
{
Name (BRIG, Package (22)
{
40, /* default AC */
40, /* default Battery */
5,
10,
15,
20,
25,
30,
35,
40,
45,
50,
55,
60,
65,
70,
75,
80,
85,
90,
95,
100
})
}

4
src/mainboard/system76/lemp9/acpi/ec.asl
View File

@@ -39,6 +39,10 @@ Device (EC0)
^^^^BAT0.UPBI()
^^^^BAT0.UPBS()
// Notify of changes
Notify(^^^^AC, Zero)
Notify(^^^^BAT0, Zero)
PNOT ()
// EC is now available

3
src/mainboard/system76/lemp9/devicetree.cb
View File

@@ -169,6 +169,9 @@ chip soc/intel/cannonlake
# Serial IRQ Continuous
register "serirq_mode" = "SERIRQ_CONTINUOUS"
# Graphics (soc/intel/cannonlake/graphics.c)
register "gfx" = "GMA_STATIC_DISPLAYS(0)"
# LPC (soc/intel/cannonlake/lpc.c)
# LPC configuration from lspci -s 1f.0 -xxx
# Address 0x84: Decode 0x80 - 0x8F (Port 80)

1
src/mainboard/system76/lemp9/dsdt.asl
View File

@@ -18,6 +18,7 @@ DefinitionBlock(
{
#include <soc/intel/common/block/acpi/acpi/northbridge.asl>
#include <soc/intel/cannonlake/acpi/southbridge.asl>
#include "acpi/backlight.asl"
}
#include <southbridge/intel/common/acpi/sleepstates.asl>

32
src/mainboard/system76/oryp6/acpi/backlight.asl Normal file
View File

@@ -0,0 +1,32 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <drivers/intel/gma/acpi/gma.asl>
Scope (GFX0)
{
Name (BRIG, Package (22)
{
40, /* default AC */
40, /* default Battery */
5,
10,
15,
20,
25,
30,
35,
40,
45,
50,
55,
60,
65,
70,
75,
80,
85,
90,
95,
100
})
}

3
src/mainboard/system76/oryp6/devicetree.cb
View File

@@ -208,6 +208,9 @@ chip soc/intel/cannonlake
# Serial IRQ Continuous
register "serirq_mode" = "SERIRQ_CONTINUOUS"
# Graphics (soc/intel/cannonlake/graphics.c)
register "gfx" = "GMA_STATIC_DISPLAYS(0)"
# LPC (soc/intel/cannonlake/lpc.c)
# LPC configuration from lspci -s 1f.0 -xxx
# Address 0x84: Decode 0x80 - 0x8F (Port 80)

1
src/mainboard/system76/oryp6/dsdt.asl
View File

@@ -18,6 +18,7 @@ DefinitionBlock(
{
#include <soc/intel/common/block/acpi/acpi/northbridge.asl>
#include <soc/intel/cannonlake/acpi/southbridge.asl>
#include "acpi/backlight.asl"
#include "acpi/pegp.asl"
#include "acpi/dgpu.asl"
}

32
src/mainboard/system76/whl-u/acpi/backlight.asl Normal file
View File

@@ -0,0 +1,32 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <drivers/intel/gma/acpi/gma.asl>
Scope (GFX0)
{
Name (BRIG, Package (22)
{
40, /* default AC */
40, /* default Battery */
5,
10,
15,
20,
25,
30,
35,
40,
45,
50,
55,
60,
65,
70,
75,
80,
85,
90,
95,
100
})
}

4
src/mainboard/system76/whl-u/acpi/ec.asl
View File

@@ -39,6 +39,10 @@ Device (EC0)
^^^^BAT0.UPBI()
^^^^BAT0.UPBS()
// Notify of changes
Notify(^^^^AC, Zero)
Notify(^^^^BAT0, Zero)
PNOT ()
// EC is now available

3
src/mainboard/system76/whl-u/devicetree.cb
View File

@@ -169,6 +169,9 @@ chip soc/intel/cannonlake
# Serial IRQ Continuous
register "serirq_mode" = "SERIRQ_CONTINUOUS"
# Graphics (soc/intel/cannonlake/graphics.c)
register "gfx" = "GMA_STATIC_DISPLAYS(0)"
# LPC (soc/intel/cannonlake/lpc.c)
# LPC configuration from lspci -s 1f.0 -xxx
# Address 0x84: Decode 0x80 - 0x8F (Port 80)

1
src/mainboard/system76/whl-u/dsdt.asl
View File

@@ -18,6 +18,7 @@ DefinitionBlock(
{
#include <soc/intel/common/block/acpi/acpi/northbridge.asl>
#include <soc/intel/cannonlake/acpi/southbridge.asl>
#include "acpi/backlight.asl"
}
#include <southbridge/intel/common/acpi/sleepstates.asl>

1
src/soc/intel/cannonlake/Makefile.inc
View File

@@ -38,6 +38,7 @@ ramstage-y += finalize.c
ramstage-y += fsp_params.c
ramstage-y += gspi.c
ramstage-y += i2c.c
ramstage-y += graphics.c
ramstage-y += lockdown.c
ramstage-y += lpc.c
ramstage-y += me.c

2
src/soc/intel/cannonlake/acpi/southbridge.asl
View File

@@ -17,7 +17,7 @@
#endif
/* GFX 00:02.0 */
#include "gfx.asl"
//TODO: fix inclusion when using gma ACPI #include "gfx.asl"
/* LPC 0:1f.0 */
#include <soc/intel/common/block/acpi/acpi/lpc.asl>

4
src/soc/intel/cannonlake/chip.h
View File

@@ -5,6 +5,7 @@
#include <intelblocks/cfg.h>
#include <drivers/i2c/designware/dw_i2c.h>
#include <drivers/intel/gma/gma.h>
#include <intelblocks/gpio.h>
#include <intelblocks/gspi.h>
#include <intelblocks/lpc_lib.h>
@@ -434,6 +435,9 @@ struct soc_intel_cannonlake_config {
* Only override CPU flex ratio if don't want to boot with non-turbo max.
*/
uint8_t cpu_ratio_override;
/* i915 struct for GMA backlight control */
struct i915_gpu_controller_info gfx;
};
typedef struct soc_intel_cannonlake_config config_t;

11
src/soc/intel/cannonlake/graphics.c Normal file
View File

@@ -0,0 +1,11 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <intelblocks/graphics.h>
#include <soc/ramstage.h>
const struct i915_gpu_controller_info *
intel_igd_get_controller_info(const struct device *device)
{
struct soc_intel_cannonlake_config *chip = device->chip_info;
return &chip->gfx;
}