mainboards/amd/fam10: Add romstage timestamps
Example output: 1:start of rom stage 542 2:before ram initialization 193,989 (193,447) 3:after ram initialization 3,319,114 (3,125,124) 4:end of romstage 3,320,004 (889) Change-Id: Idcde7dc4c7a1d6c3118c82b67e8c2fcd4a07553b Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-on: http://review.coreboot.org/8776 Tested-by: build bot (Jenkins) Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
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committed by
Kyösti Mälkki
parent
a2a4bcf1a5
commit
91e9f676b7
@@ -33,6 +33,7 @@
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#include <device/pnp_def.h>
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#include <cpu/x86/lapic.h>
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#include <console/console.h>
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#include <timestamp.h>
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#include <cpu/amd/model_10xxx_rev.h>
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#include <northbridge/amd/amdfam10/raminit.h>
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#include <northbridge/amd/amdfam10/amdfam10.h>
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@@ -77,6 +78,9 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
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u32 bsp_apicid = 0, val;
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msr_t msr;
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timestamp_init(timestamp_get());
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timestamp_add_now(TS_START_ROMSTAGE);
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if (!cpu_init_detectedx && boot_cpu()) {
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/* Nothing special needs to be done to find bus 0 */
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/* Allow the HT devices to be found */
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@@ -198,8 +202,11 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
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// die("Die Before MCT init.");
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timestamp_add_now(TS_BEFORE_INITRAM);
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printk(BIOS_DEBUG, "raminit_amdmct()\n");
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raminit_amdmct(sysinfo);
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timestamp_add_now(TS_AFTER_INITRAM);
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cbmem_initialize_empty();
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post_code(0x41);
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@@ -215,6 +222,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
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rs780_before_pci_init();
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sb7xx_51xx_before_pci_init();
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timestamp_add_now(TS_END_ROMSTAGE);
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post_code(0x42);
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post_cache_as_ram(); // BSP switch stack to ram, copy then execute LB.
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post_code(0x43); // Should never see this post code.
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