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AGESA: Split long lines in OemCustomize.c

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Change-Id: I907f55622e6aaba401471239f706ab24cd26319f
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/21651
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
This commit is contained in:
Kyösti Mälkki
2017-09-23 19:10:04 +03:00
parent c700829cd3
commit 9fee35c6c4
17 changed files with 440 additions and 91 deletions
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30
src/mainboard/amd/persimmon/OemCustomize.c
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@@ -24,31 +24,51 @@ static const PCIe_PORT_DESCRIPTOR PortList[] = {
{
0,
PCIE_ENGINE_DATA_INITIALIZER(PciePortEngine, 4, 4),
PCIE_PORT_DATA_INITIALIZER(PortEnabled, ChannelTypeExt6db, 4, HotplugDisabled, PcieGen2, PcieGen2, AspmL0sL1, 46)
PCIE_PORT_DATA_INITIALIZER(PortEnabled, ChannelTypeExt6db, 4,
HotplugDisabled,
PcieGen2,
PcieGen2,
AspmL0sL1, 46)
},
// Initialize Port descriptor (PCIe port, Lanes 5, PCI Device Number 5, ...)
{
0,
PCIE_ENGINE_DATA_INITIALIZER(PciePortEngine, 5, 5),
PCIE_PORT_DATA_INITIALIZER(PortEnabled, ChannelTypeExt6db, 5, HotplugDisabled, PcieGen2, PcieGen2, AspmL0sL1, 46)
PCIE_PORT_DATA_INITIALIZER(PortEnabled, ChannelTypeExt6db, 5,
HotplugDisabled,
PcieGen2,
PcieGen2,
AspmL0sL1, 46)
},
// Initialize Port descriptor (PCIe port, Lanes 6, PCI Device Number 6, ...)
{
0,
PCIE_ENGINE_DATA_INITIALIZER(PciePortEngine, 6, 6),
PCIE_PORT_DATA_INITIALIZER(PortEnabled, ChannelTypeExt6db, 6, HotplugDisabled, PcieGen2, PcieGen2, AspmL0sL1, 46)
PCIE_PORT_DATA_INITIALIZER(PortEnabled, ChannelTypeExt6db, 6,
HotplugDisabled,
PcieGen2,
PcieGen2,
AspmL0sL1, 46)
},
// Initialize Port descriptor (PCIe port, Lanes 7, PCI Device Number 7, ...)
{
0,
PCIE_ENGINE_DATA_INITIALIZER(PciePortEngine, 7, 7),
PCIE_PORT_DATA_INITIALIZER(PortDisabled, ChannelTypeExt6db, 7, HotplugDisabled, PcieGen2, PcieGen2, AspmL0sL1, 0)
PCIE_PORT_DATA_INITIALIZER(PortDisabled, ChannelTypeExt6db, 7,
HotplugDisabled,
PcieGen2,
PcieGen2,
AspmL0sL1, 0)
},
// Initialize Port descriptor (PCIe port, Lanes 8, PCI Device Number 8, ...)
{
DESCRIPTOR_TERMINATE_LIST,
PCIE_ENGINE_DATA_INITIALIZER(PciePortEngine, 0, 3),
PCIE_PORT_DATA_INITIALIZER(PortEnabled, ChannelTypeExt6db, 8, HotplugDisabled, PcieGen2, PcieGen2, AspmL0sL1, 0)
PCIE_PORT_DATA_INITIALIZER(PortEnabled, ChannelTypeExt6db, 8,
HotplugDisabled,
PcieGen2,
PcieGen2,
AspmL0sL1, 0)
}
};