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soc/intel/{cannonlake,icelake}: Drop unhooked SendVrMbxCmd

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This option's value is not used anywhere. Remove it.

Change-Id: I0f30cddd30d459f48b51f377b111bbc04709c5f8
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52102
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by:  Felix Singer <felixsinger@posteo.net>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
This commit is contained in:
Angel Pons 2021-04-05 12:12:16 +02:00 committed by Patrick Georgi
parent 00f53a8d9e
commit a3d33795f8
4 changed files with 0 additions and 20 deletions
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3
src/mainboard/clevo/cml-u/variants/l140cu/devicetree.cb
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@ -9,9 +9,6 @@ chip soc/intel/cannonlake
},
}"
# Send an extra VR mailbox command for the PS4 exit issue
register "SendVrMbxCmd" = "2"
# CPU (soc/intel/cannonlake/cpu.c)
# Power limit
register "power_limits_config" = "{

3
src/mainboard/system76/lemp9/devicetree.cb
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@ -9,9 +9,6 @@ chip soc/intel/cannonlake
},
}"
# Send an extra VR mailbox command for the PS4 exit issue
register "SendVrMbxCmd" = "2"
# CPU (soc/intel/cannonlake/cpu.c)
# Power limit
register "power_limits_config" = "{

7
src/soc/intel/cannonlake/chip.h
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@ -223,13 +223,6 @@ struct soc_intel_cannonlake_config {
/* Enables support for Teton Glacier hybrid storage device */
uint8_t TetonGlacierMode;
/* Enable VR specific mailbox command
* 00b - no VR specific cmd sent
* 01b - VR mailbox cmd specifically for the MPS IMPV8 VR will be sent
* 10b - VR specific cmd sent for PS4 exit issue
* 11b - Reserved */
uint8_t SendVrMbxCmd;
/* Enable/Disable EIST. 1b:Enabled, 0b:Disabled */
uint8_t eist_enable;

7
src/soc/intel/icelake/chip.h
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@ -138,13 +138,6 @@ struct soc_intel_icelake_config {
* Setting to 0 (default) disables Heci1 and hides the device from OS */
uint8_t HeciEnabled;
/* Enable VR specific mailbox command
* 00b - no VR specific cmd sent
* 01b - VR mailbox cmd specifically for the MPS IMPV8 VR will be sent
* 10b - VR specific cmd sent for PS4 exit issue
* 11b - Reserved */
uint8_t SendVrMbxCmd;
/* Enable/Disable EIST. 1b:Enabled, 0b:Disabled */
uint8_t eist_enable;