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mb/google/nissa/var/nivviks: Enable Bluetooth for PCIE

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PCIe based Bluetooth is on port8. This cl enables bluetooth for PCIe
based Wifi7 module.

BUG=b:345596420
BRANCH=NONE
TEST=With proper FW config enabled, BT gets detected on port8

Change-Id: I989cf6122f2555cc89f622e4ce5d21b574d0458e
Signed-off-by: Poornima Tom <poornima.tom@intel.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83076
Reviewed-by: Eric Lai <ericllai@google.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Poornima Tom
2024-06-14 03:48:59 +05:30
committed by Subrata Banik
parent 5a0e7f5be0
commit a4756e3890
1 changed files with 5 additions and 1 deletions
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6
src/mainboard/google/brya/variants/nivviks/overridetree.cb
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@@ -41,7 +41,8 @@ chip soc/intel/alderlake
register "typec_aux_bias_pads[0]" = "{.pad_auxp_dc = GPP_E22, .pad_auxn_dc = GPP_E23}"
register "typec_aux_bias_pads[1]" = "{.pad_auxp_dc = GPP_A21, .pad_auxn_dc = GPP_A22}"
register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth port for CNVi WLAN
register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth port for CNVi WLAN (WIFI6)
register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth port for WIFI PCIE (WIFI7)
# Configure external V1P05/Vnn/VnnSx Rails
register "ext_fivr_settings" = "{
@@ -660,6 +661,9 @@ chip soc/intel/alderlake
device ref usb2_port10 on
probe WIFI_CATEGORY WIFI_6
end
device ref usb2_port8 on
probe WIFI_CATEGORY WIFI_7
end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-A Port A0 (MLB)""