mb/siemens/mc_apl{1,2,3,5,6}: Provide I2C timings for 400 kHz
The I2C bus at which the external RTC is attached to is operated at standard speed (100 kHz) at coreboot runtime. The OS can choose to run it at fast speed since it uses its own driver and controller setup. Report additional bus timings for fast mode so that OS can do it right. Change-Id: I82e11e5dde8ad1047713f105c5a6d020eebf1ffd Signed-off-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55089 Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -49,7 +49,13 @@ chip soc/intel/apollolake
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.speed = I2C_SPEED_STANDARD,
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.rise_time_ns = 160,
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.fall_time_ns = 110,
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.data_hold_time_ns = 300
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.data_hold_time_ns = 300,
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.speed_config[0] = {
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.speed = I2C_SPEED_FAST,
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.scl_hcnt = 0x58,
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.scl_lcnt = 0xcf,
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.sda_hold = 0x28
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},
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},
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}"
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@ -47,7 +47,13 @@ chip soc/intel/apollolake
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.speed = I2C_SPEED_STANDARD,
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.rise_time_ns = 60,
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.fall_time_ns = 20,
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.data_hold_time_ns = 300
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.data_hold_time_ns = 300,
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.speed_config[0] = {
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.speed = I2C_SPEED_FAST,
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.scl_hcnt = 0x68,
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.scl_lcnt = 0xd4,
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.sda_hold = 0x28
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},
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},
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}"
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@ -44,7 +44,13 @@ chip soc/intel/apollolake
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.speed = I2C_SPEED_STANDARD,
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.rise_time_ns = 40,
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.fall_time_ns = 10,
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.data_hold_time_ns = 300
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.data_hold_time_ns = 300,
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.speed_config[0] = {
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.speed = I2C_SPEED_FAST,
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.scl_hcnt = 0x68,
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.scl_lcnt = 0xd1,
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.sda_hold = 0x28
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},
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},
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}"
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@ -47,7 +47,13 @@ chip soc/intel/apollolake
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.speed = I2C_SPEED_STANDARD,
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.rise_time_ns = 160,
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.fall_time_ns = 110,
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.data_hold_time_ns = 300
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.data_hold_time_ns = 300,
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.speed_config[0] = {
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.speed = I2C_SPEED_FAST,
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.scl_hcnt = 0x5b,
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.scl_lcnt = 0xce,
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.sda_hold = 0x28
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},
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},
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}"
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@ -18,7 +18,13 @@ chip soc/intel/apollolake
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.speed = I2C_SPEED_STANDARD,
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.rise_time_ns = 40,
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.fall_time_ns = 10,
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.data_hold_time_ns = 300
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.data_hold_time_ns = 300,
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.speed_config[0] = {
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.speed = I2C_SPEED_FAST,
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.scl_hcnt = 0x68,
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.scl_lcnt = 0xd1,
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.sda_hold = 0x28
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},
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}
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}"
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