mb/google/rex: Add ACPI support for Type-C ports

This patch backported from commit ba2e51bd496a (mb/google/brya: brya0:
Add ACPI support for Type-C ports) for google/rex.

BUG=b:224325352
TEST=Able to build Google/Rex and boot on MTLRVP.

Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: If0a9510784e8f62861ae4bc74805b1513a4865cb
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66538
Reviewed-by: Prashant Malani <pmalani@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Ivy Jian <ivy.jian@quanta.corp-partner.google.com>

src/mainboard/google/rex/Kconfig

@@ -12,6 +12,7 @@ config BOARD_GOOGLE_REX_COMMON
 config BOARD_GOOGLE_BASEBOARD_REX
 	def_bool n
 	select BOARD_GOOGLE_REX_COMMON
+	select DRIVERS_INTEL_PMC
 	select EC_GOOGLE_CHROMEEC
 	select EC_GOOGLE_CHROMEEC_ESPI
 	select MAINBOARD_HAS_CHROMEOS

src/mainboard/google/rex/dsdt.asl

@@ -27,6 +27,7 @@ DefinitionBlock(
 		{
 			#include <soc/intel/common/block/acpi/acpi/northbridge.asl>
 			#include <soc/intel/meteorlake/acpi/southbridge.asl>
+			#include <soc/intel/meteorlake/acpi/tcss.asl>
 		}
 	}
 

src/mainboard/google/rex/variants/rex0/overridetree.cb

@@ -228,6 +228,29 @@ chip soc/intel/meteorlake
 			}"
 		end	#PCIE6 WWAN card
 		device ref gspi1 on end
+		device ref soc_espi on
+			chip ec/google/chromeec
+				use conn0 as mux_conn[0]
+				use conn1 as mux_conn[1]
+				device pnp 0c09.0 on end
+			end
+		end
+		device ref pmc hidden
+			chip drivers/intel/pmc_mux
+				device generic 0 on
+					chip drivers/intel/pmc_mux/conn
+						use usb2_port2 as usb2_port
+						use tcss_usb3_port1 as usb3_port
+						device generic 0 alias conn0 on end
+					end
+					chip drivers/intel/pmc_mux/conn
+						use usb2_port4 as usb2_port
+						use tcss_usb3_port3 as usb3_port
+						device generic 1 alias conn1 on end
+					end
+				end
+			end
+		end
 		device ref hda on end
 	end
 end