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mb/google/trulo/var/orisa: Configure SEN_MODE_EC_PCH_INT_ODL as input

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Configure GPP_R2 as input, no pull according to schematic_20240614.

BUG=b:333486830
BRANCH=firmware-nissa-15217.B
TEST=emerge-nissa coreboot

Change-Id: Ic678b77e5489f56d8ff92b265a6ca5852c0f7e8d
Signed-off-by: Amanda Huang <amanda_hwang@compal.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83142
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <ericllai@google.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
This commit is contained in:
Amanda Huang 2024-06-20 16:50:41 +08:00 committed by Eric Lai
parent c0ba181403
commit ad3472a93c
1 changed files with 1 additions and 1 deletions
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src/mainboard/google/brya/variants/orisa/gpio.c
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@ -122,7 +122,7 @@ static const struct pad_config gpio_table[] = {
/* D1 : ISH_GP1 ==> SOC_GSEN2_INT# */
PAD_CFG_NF_LOCK(GPP_D1, NONE, NF1, LOCK_CONFIG),
/* D2 : ISH_GP2 ==> SEN_MODE_EC_PCH_INT_ODL */
PAD_CFG_NF_LOCK(GPP_D2, NONE, NF1, LOCK_CONFIG),
PAD_CFG_GPI_LOCK(GPP_D2, NONE, LOCK_CONFIG),
/* D3 : NC */
PAD_NC_LOCK(GPP_D3, NONE, LOCK_CONFIG),
/* D4 : NC */