soc/amd/psp_verstage: Add -Oz flag for clang
When we tried to add CMOS support to PSP verstage (CB:83495), the clang builds failed on boards with cezanne SoC (such as Guybrush), due to over-sized verstage. On the other hand, there is no such problem for gcc builds on the same boards. Building PSP verstage by clang generates much larger verstage size (81K) compared with using gcc (67K). To unblock adding features to verstage, temporarily enable -Oz for clang builds. Change-Id: I033458556986ade88fb8e68499b632deae4dd419 Signed-off-by: Yu-Ping Wu <yupingso@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83594 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Nico Huber <nico.h@gmx.de>
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@ -9,6 +9,9 @@ ifeq ($(CONFIG_COMPILER_GCC),y)
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CFLAGS_arm += -Wstack-usage=40960
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else
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CFLAGS_arm += -Wframe-larger-than=40960
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# Cezanne only has 148KB SRAM for PSP verstage.
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# Add -Oz to reduce the verstage size for clang.
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CFLAGS_arm += -Oz
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endif
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verstage-y += boot_dev.c
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