Add bootblock to set early GPIOs, set TBT GPIOs to match proprietary BIOS

src/mainboard/system76/kbl-u/Makefile.inc

@@ -1 +1,2 @@
+bootblock-y += bootblock.c
 ramstage-y += ramstage.c variants/$(VARIANT_DIR)/hda_verb.c

src/mainboard/system76/kbl-u/bootblock.c

@@ -0,0 +1,23 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2019 System76
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <bootblock_common.h>
+#include <gpio.h>
+#include <soc/gpio.h>
+#include <variant/gpio.h>
+
+void bootblock_mainboard_init(void) {
+	gpio_configure_pads(early_gpio_table, ARRAY_SIZE(early_gpio_table));
+}

src/mainboard/system76/kbl-u/gpio.h

@@ -107,17 +107,17 @@ static const struct pad_config gpio_table[] = {
 
 	// ISH
 		// TBTA_ACE_GPIO3
-		PAD_CFG_GPO(GPP_A18, 1, DEEP),
+		PAD_CFG_TERM_GPO(GPP_A18, 1, NONE, DEEP),
 		// SATA_PWR_EN
 		PAD_CFG_GPO(GPP_A19, 1, DEEP),
 		// TBTA_ACE_GPIO0
-		PAD_CFG_GPO(GPP_A20, 0, DEEP),
+		PAD_CFG_TERM_GPO(GPP_A20, 0, NONE, DEEP),
 		// TBT_FRC_PWR
-		PAD_CFG_GPO(GPP_A21, 0, DEEP),
+		PAD_CFG_TERM_GPO(GPP_A21, 1, DN_20K, PLTRST),
 		// PS8338B_SW
-		PAD_CFG_GPO(GPP_A22, 0, DEEP),
+		PAD_CFG_TERM_GPO(GPP_A22, 0, NONE, PWROK),
 		// PS8338B_PCH
-		PAD_CFG_GPO(GPP_A23, 0, DEEP),
+		PAD_CFG_TERM_GPO(GPP_A23, 0, NONE, PWROK),
 
 // GPP_B
 	// CPU Power
@@ -217,7 +217,7 @@ static const struct pad_config gpio_table[] = {
 		// TBTA_ACE_GPIO2
 		PAD_CFG_NC(GPP_C12),
 		// TBCIO_PLUG_EVENT
-		_PAD_CFG_STRUCT(GPP_C13, 0x82880100, 0x0),
+		_PAD_CFG_STRUCT(GPP_C13, 0x82880100, 0x0000),
 		// TBTA_MRESET
 		PAD_CFG_NC(GPP_C14),
 		// TBTA_ACE_GPIO7
@@ -231,7 +231,7 @@ static const struct pad_config gpio_table[] = {
 		// NC
 		PAD_CFG_NC(GPP_C18),
 		// SWI#
-		_PAD_CFG_STRUCT(GPP_C19, 0x40880100, 0x0),
+		_PAD_CFG_STRUCT(GPP_C19, 0x40880100, 0x0000),
 		// UART2_RXD
 		PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1),
 		// UART2_TXD

src/mainboard/system76/whl-u/Makefile.inc

@@ -1 +1,2 @@
+bootblock-y += bootblock.c
 ramstage-y += ramstage.c variants/$(VARIANT_DIR)/hda_verb.c

src/mainboard/system76/whl-u/bootblock.c

@@ -0,0 +1,23 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2019 System76
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <bootblock_common.h>
+#include <gpio.h>
+#include <soc/gpio.h>
+#include <variant/gpio.h>
+
+void bootblock_mainboard_init(void) {
+	gpio_configure_pads(early_gpio_table, ARRAY_SIZE(early_gpio_table));
+}