Merge remote-tracking branch 'upstream/master' into system76_cleanup

Documentation/arch/x86/index.md

@@ -2,6 +2,8 @@
 
 This section contains documentation about coreboot on x86 architecture.
 
+* [x86 PAE support](pae.md)
+
 ## State of x86_64 support
 At the moment there's no single board that supports x86_64 or to be exact
 `ARCH_RAMSTAGE_X86_64` and `ARCH_ROMSTAGE_X86_64`.

Documentation/arch/x86/pae.md

@@ -0,0 +1,15 @@
+# x86_32 PAE documentation
+
+Due to missing x86_64 support it's required to use PAE enabled x86_32 code.
+The corresponding functions can be found in ``src/cpu/x86/pae/``.
+
+## Memory clearing helper functions
+
+To clear all DRAM on request of the
+[Security API](../../security/memory_clearing.md), a helper function can be used
+called `memset_pae`.
+The function has additional requirements in contrast to `memset`, and has more
+overhead as it uses virtual memory to access memory above 4GiB.
+Memory is cleared in 2MiB chunks, which might take a while.
+
+Make sure to enable caches through MTRRs, otherwise `memset_pae` will be slow!

Documentation/security/memory_clearing.md

@@ -42,3 +42,7 @@ Without MTRRs (and caches enabled) clearing memory takes multiple seconds.
 
 As some platforms place code and stack in DRAM (FSP1.0), the regions can be
 skipped.
+
+## Architecture specific implementations
+
+* [x86 PAE](../arch/x86/pae.md)

Documentation/soc/intel/fsp/index.md

@@ -2,6 +2,39 @@
 
 This section contains documentation about Intel-FSP in public domain.
 
+## Bugs
+As Intel doesn't even list known bugs, they are collected here until
+those are fixed. If possible a workaround is described here as well.
+
+### BroadwellDEFsp
+
+* IA32_FEATURE_CONTROL MSR is locked in FSP-M
+  * Release MR2
+  * Writing the MSR is required in ramstage for Intel TXT
+  * Workaround: none
+  * Issue on public tracker: [Issue 10]
+
+* FSP-S asserts if the thermal PCI device 00:1f.6 is disabled
+  * Release MR2
+  * FSP expects the PCI device to be enabled
+  * FSP expects BARs to be properly assigned
+  * Workaround: Don't disable this PCI device
+  * Issue on public tracker: [Issue 13]
+
+### KabylakeFsp
+* MfgId and ModulePartNum in the DIMM_INFO struct are empty
+  * Release 3.7.1
+  * Those values are typically consumed by SMBIOS type 17
+  * Workaround: none
+  * Issue on public tracker: [Issue 22]
+
+### BraswellFsp
+* Internal UART can't be disabled using PcdEnableHsuart*
+  * Release MR2
+  * Workaround: Disable internal UART manually after calling FSP
+  * Issue on public tracker: [Issue 10]
+
+
 ## Open Source Intel FSP specification
 
 * [About Intel FSP](https://firmware.intel.com/learn/fsp/about-intel-fsp)
@@ -15,3 +48,13 @@ This section contains documentation about Intel-FSP in public domain.
 ## Additional Features in FSP 2.1 specification
 
 - [PPI](ppi/ppi.md)
+
+## Official bugtracker
+
+- [IntelFSP/FSP](https://github.com/IntelFsp/FSP/issues)
+
+[Issue 10]: https://github.com/IntelFsp/FSP/issues/10
+[Issue 13]: https://github.com/IntelFsp/FSP/issues/13
+[Issue 15]: https://github.com/IntelFsp/FSP/issues/15
+[Issue 22]: https://github.com/IntelFsp/FSP/issues/22
+

Documentation/soc/intel/mp_init/mp_init.md

@@ -27,9 +27,9 @@ Considering these facts, there are 3 possible solutions to perform MP
 initialization from coreboot + FSP space.
 
 1. coreboot to perform complete MP initialization by its own. This includes
-BSP and AP programming of CPU features mostly non-restricted one. Preferred
-Kconfig is USE_COREBOOT_NATIVE_MP_INIT. SoCs like SKL, KBL, APL are okay to
-make use of same Kconfig option for MP initialization.
+BSP and AP programming of CPU features mostly non-restricted one. This is
+the default configuration. Most SoCs like SKL, KBL, APL are okay to make use
+of this MP initialization method.
 
 2. Alternatively, SoC users also can skip coreboot doing MP initialization
 and make use of FSP binary to perform same task. This can be achieved by using

Makefile.inc

@@ -514,6 +514,7 @@ FMAPTOOL:=$(objutil)/cbfstool/fmaptool
 RMODTOOL:=$(objutil)/cbfstool/rmodtool
 IFWITOOL:=$(objutil)/cbfstool/ifwitool
 IFITTOOL:=$(objutil)/cbfstool/ifittool
+AMDCOMPRESS:=$(objutil)/cbfstool/amdcompress
 
 $(obj)/cbfstool: $(CBFSTOOL)
 	cp $< $@
@@ -530,6 +531,9 @@ $(obj)/ifwitool: $(IFWITOOL)
 $(obj)/ifittool: $(IFITTOOL)
 	cp $< $@
 
+$(obj)/amdcompress: $(AMDCOMPRESS)
+	cp $< $@
+
 _WINCHECK=$(shell uname -o 2> /dev/null)
 STACK=
 ifeq ($(_WINCHECK),Msys)
@@ -642,7 +646,7 @@ install-git-commit-clangfmt:
 include util/crossgcc/Makefile.inc
 
 .PHONY: tools
-tools: $(objutil)/kconfig/conf $(CBFSTOOL) $(objutil)/cbfstool/cbfs-compression-tool $(FMAPTOOL) $(RMODTOOL) $(IFWITOOL) $(objutil)/nvramtool/nvramtool $(ROMCC_BIN) $(objutil)/sconfig/sconfig $(IFDTOOL) $(CBOOTIMAGE) $(AMDFWTOOL) $(FUTILITY) $(BINCFG) $(IFITTOOL)
+tools: $(objutil)/kconfig/conf $(CBFSTOOL) $(objutil)/cbfstool/cbfs-compression-tool $(FMAPTOOL) $(RMODTOOL) $(IFWITOOL) $(objutil)/nvramtool/nvramtool $(ROMCC_BIN) $(objutil)/sconfig/sconfig $(IFDTOOL) $(CBOOTIMAGE) $(AMDFWTOOL) $(AMDCOMPRESS) $(FUTILITY) $(BINCFG) $(IFITTOOL)
 
 ###########################################################################
 # Common recipes for all stages

configs/config.lenovo_t400_all_debug_and_option_table

@@ -7,7 +7,6 @@ CONFIG_DEBUG_CBFS=y
 CONFIG_DEBUG_RAM_SETUP=y
 CONFIG_DEBUG_SMBUS=y
 CONFIG_DEBUG_SMI=y
-CONFIG_DEBUG_SMM_RELOCATION=y
 CONFIG_DEBUG_MALLOC=y
 CONFIG_DEBUG_ACPI=y
 CONFIG_DEBUG_BOOT_STATE=y

configs/config.lenovo_thinkpad_t430_all_debug_and_option_table

@@ -9,7 +9,6 @@ CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_DEBUG_RAM_SETUP=y
 CONFIG_DEBUG_SMBUS=y
 CONFIG_DEBUG_SMI=y
-CONFIG_DEBUG_SMM_RELOCATION=y
 CONFIG_DEBUG_SPI_FLASH=y
 CONFIG_DEBUG_BOOT_STATE=y
 CONFIG_DEBUG_ADA_CODE=y

configs/config.lenovo_x201_all_debug_option_table_bt_on_wifi

@@ -6,7 +6,6 @@ CONFIG_FATAL_ASSERTS=y
 CONFIG_DEBUG_CBFS=y
 CONFIG_DEBUG_SMBUS=y
 CONFIG_DEBUG_SMI=y
-CONFIG_DEBUG_SMM_RELOCATION=y
 CONFIG_DEBUG_MALLOC=y
 CONFIG_DEBUG_ACPI=y
 CONFIG_DEBUG_SPI_FLASH=y

payloads/coreinfo/Makefile

@@ -83,7 +83,8 @@ OBJCOPY := $(OBJCOPY_$(ARCH-y))
 LPCC := CC="$(CC)" $(LIBPAYLOAD_OBJ)/bin/lpgcc
 LPAS := AS="$(AS)" $(LIBPAYLOAD_OBJ)/bin/lpas
 
-CFLAGS += -Wall -Werror -Os -fno-builtin $(CFLAGS_$(ARCH-y)) $(INCLUDES)
+CFLAGS += -Wall -Wextra -Wmissing-prototypes -Werror
+CFLAGS += -Os -fno-builtin $(CFLAGS_$(ARCH-y)) $(INCLUDES)
 
 ifneq ($(strip $(HAVE_DOTCONFIG)),)
 include $(src)/.config

payloads/coreinfo/coreboot_module.c

@@ -37,7 +37,7 @@ static struct {
 
 static int tables_good = 0;
 
-int coreboot_module_redraw(WINDOW *win)
+static int coreboot_module_redraw(WINDOW *win)
 {
 	int row = 2;
 	int i;
@@ -195,7 +195,7 @@ static int parse_header(void *addr, int len)
 	/* Now, walk the tables. */
 	ptr += header->header_bytes;
 
-	for (i = 0; i < header->table_entries; i++) {
+	for (u32 j = 0; j < header->table_entries; j++) {
 		struct cb_record *rec = (struct cb_record *)ptr;
 
 		switch (rec->tag) {

payloads/coreinfo/coreinfo.c

@@ -132,7 +132,7 @@ static void print_time_and_date(void)
 
 static void print_menu(void)
 {
-	int i, j;
+	int j;
 	char menu[80];
 	char *ptr = menu;
 
@@ -140,11 +140,11 @@ static void print_menu(void)
 	for (j = 0; j < SCREEN_X; j++)
 		waddch(menuwin, ' ');
 
-	for (i = 0; i < ARRAY_SIZE(categories); i++) {
+	for (size_t i = 0; i < ARRAY_SIZE(categories); i++) {
 		if (categories[i].count == 0)
 			continue;
 
-		ptr += sprintf(ptr, "F%d: %s ", i + 1, categories[i].name);
+		ptr += sprintf(ptr, "F%zu: %s ", i + 1, categories[i].name);
 	}
 
 	mvwprintw(menuwin, 1, 0, menu);
@@ -215,9 +215,9 @@ static void handle_category_key(struct coreinfo_cat *cat, int key)
 
 static void print_no_modules_selected(void)
 {
-	int height = getmaxy(stdscr), i;
+	int height = getmaxy(stdscr);
 
-	for (i = 0; i < ARRAY_SIZE(categories); i++)
+	for (size_t i = 0; i < ARRAY_SIZE(categories); i++)
 		if (categories[i].count > 0)
 			return;
 
@@ -227,9 +227,7 @@ static void print_no_modules_selected(void)
 
 static int first_nonempty_category(void)
 {
-	int i;
-
-	for (i = 0; i < ARRAY_SIZE(categories); i++)
+	for (size_t i = 0; i < ARRAY_SIZE(categories); i++)
 		if (categories[i].count > 0)
 			return i;
 	return 0;
@@ -268,7 +266,7 @@ static void loop(void)
 		if (key >= '1' && key <= '9')
 			ch = key - '1';
 
-		if (ch >= 0 && ch <= ARRAY_SIZE(categories)) {
+		if (ch >= 0 && (unsigned int)ch <= ARRAY_SIZE(categories)) {
 			if (ch == ARRAY_SIZE(categories))
 				continue;
 			if (categories[ch].count == 0)
@@ -289,7 +287,7 @@ static void loop(void)
 
 int main(void)
 {
-	int i, j;
+	int j;
 
 	if (CONFIG(LP_USB))
 		usb_initialize();
@@ -310,7 +308,7 @@ int main(void)
 
 	werase(modwin);
 
-	for (i = 0; i < ARRAY_SIZE(categories); i++) {
+	for (size_t i = 0; i < ARRAY_SIZE(categories); i++) {
 		for (j = 0; j < categories[i].count; j++)
 			categories[i].modules[j]->init();
 	}

payloads/coreinfo/coreinfo.h

@@ -27,8 +27,7 @@ struct coreinfo_module {
 	int (*handle) (int);
 };
 
-extern void docpuid(int, unsigned long *, unsigned long *, unsigned long *,
-		    unsigned long *);
+extern void docpuid(uint32_t idx, uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx);
 
 void print_module_title(WINDOW *win, const char *title);
 

payloads/coreinfo/cpuinfo_module.c

@@ -85,7 +85,7 @@ static const char *amd_cap_extended_ecx_flags[] = {
 	NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL
 };
 
-static unsigned long vendor;
+static uint32_t vendor;
 static unsigned int cpu_khz;
 
 static void decode_flags(WINDOW *win, unsigned long reg, const char **flags,
@@ -114,7 +114,7 @@ static void decode_flags(WINDOW *win, unsigned long reg, const char **flags,
 
 static void get_features(WINDOW *win, int *row)
 {
-	unsigned long eax, ebx, ecx, edx;
+	uint32_t eax, ebx, ecx, edx;
 	int lrow = *row;
 
 	wmove(win, lrow++, 1);
@@ -150,12 +150,12 @@ static void get_features(WINDOW *win, int *row)
 static void do_name(WINDOW *win, int row)
 {
 	char name[49], *p;
-	unsigned long eax, ebx, ecx, edx;
-	int i, t;
+	uint32_t eax, ebx, ecx, edx;
+	int t;
 
 	p = name;
 
-	for (i = 0x80000002; i <= 0x80000004; i++) {
+	for (uint32_t i = 0x80000002; i <= 0x80000004; i++) {
 		docpuid(i, &eax, &ebx, &ecx, &edx);
 
 		if (eax == 0)
@@ -176,7 +176,7 @@ static void do_name(WINDOW *win, int row)
 
 static int cpuinfo_module_redraw(WINDOW *win)
 {
-	unsigned long eax, ebx, ecx, edx;
+	uint32_t eax, ebx, ecx, edx;
 	unsigned int brand;
 	char *vstr;
 	int row = 2;

payloads/coreinfo/multiboot_module.c

@@ -32,7 +32,7 @@ static struct {
 
 static int tables_good = 0;
 
-int multiboot_module_redraw(WINDOW *win)
+static int multiboot_module_redraw(WINDOW *win)
 {
 	int row = 2;
 	int i;

payloads/coreinfo/pci_module.c

@@ -51,7 +51,7 @@ static void swap(struct pci_devices *a, struct pci_devices *b)
 
 static int partition(struct pci_devices *list, int len)
 {
-	int val = list[len / 2].device;
+	pcidev_t val = list[len / 2].device;
 	int index = 0;
 	int i;
 

payloads/coreinfo/timestamps_module.c

@@ -29,9 +29,7 @@ static unsigned long tick_freq_mhz;
 
 static const char *timestamp_name(uint32_t id)
 {
-	int i;
-
-	for (i = 0; i < ARRAY_SIZE(timestamp_ids); i++) {
+	for (size_t i = 0; i < ARRAY_SIZE(timestamp_ids); i++) {
 		if (timestamp_ids[i].id == id)
 			return timestamp_ids[i].name;
 	}
@@ -184,7 +182,7 @@ static int timestamps_module_init(void)
 	prev_stamp = base_time;
 
 	total_time = 0;
-	for (int i = 0; i < n_entries; i++) {
+	for (u32 i = 0; i < n_entries; i++) {
 		uint64_t stamp;
 		const struct timestamp_entry *tse = &timestamps->entries[i];
 

payloads/external/GRUB2/Kconfig

@@ -5,7 +5,7 @@ choice
 	default GRUB2_STABLE
 
 config GRUB2_STABLE
-	bool "2.02"
+	bool "2.04"
 	help
 	  Stable GRUB2 version
 

payloads/external/GRUB2/Makefile

@@ -1,9 +1,9 @@
 TAG-$(CONFIG_GRUB2_MASTER)=
 TAG-$(CONFIG_GRUB2_REVISION)=$(CONFIG_GRUB2_REVISION_ID)
-TAG-$(CONFIG_GRUB2_STABLE)=e54c99aaff5e5f6f5d3b06028506c57e66d8ef77
+TAG-$(CONFIG_GRUB2_STABLE)=grub-2.04
 NAME-$(CONFIG_GRUB2_MASTER)=HEAD
 NAME-$(CONFIG_GRUB2_REVISION)=$(CONFIG_GRUB2_REVISION_ID)
-NAME-$(CONFIG_GRUB2_STABLE)=2.02
+NAME-$(CONFIG_GRUB2_STABLE)=2.04
 
 project_git_repo=https://git.savannah.gnu.org/git/grub.git/
 project_dir=grub2
@@ -28,7 +28,7 @@ grub2/build/config.h: $(CONFIG_DEP) | checkout
 	echo "    CONFIG     GRUB2 $(NAME-y)"
 	rm -rf grub2/build
 	mkdir grub2/build
-	cd grub2 && ./autogen.sh
+	cd grub2 && ./bootstrap.sh ; ./autogen.sh
 	cd grub2/build && ../configure CC="$(HOSTCC)" LD="$(LD)" \
 	FREETYPE="pkg-config freetype2" BUILD_FREETYPE="pkg-config freetype2" \
 	TARGET_CC="$(CC)" TARGET_OBJCOPY="$(OBJCOPY)" TARGET_STRIP="$(STRIP)" \

payloads/external/Memtest86Plus/Makefile

@@ -15,7 +15,7 @@
 
 TAG-$(CONFIG_MEMTEST_MASTER)=origin/master
 NAME-$(CONFIG_MEMTEST_MASTER)=Master
-TAG-$(CONFIG_MEMTEST_STABLE)=3754fd440f4009b62244e0f95c56bbb12c2fffcb
+TAG-$(CONFIG_MEMTEST_STABLE)=0bd34c22604660e4283316331f3e7bf8a3863753
 NAME-$(CONFIG_MEMTEST_STABLE)=Stable
 TAG-$(CONFIG_MEMTEST_REVISION)=$(CONFIG_MEMTEST_REVISION_ID)
 

payloads/libpayload/Makefile.inc

@@ -130,6 +130,7 @@ junit.xml:
 	echo '<?xml version="1.0" encoding="utf-8"?><testsuite>' > $@.tmp
 	for i in $(filter-out %.old,$(wildcard configs/*)); do \
 		$(MAKE) clean; \
+		echo "Building libpayload for $$i"; \
 		cp "$$i" junit_config; \
 		$(MAKE) olddefconfig DOTCONFIG=junit_config V=$(V) Q=$(Q) 2>/dev/null >/dev/null; \
 		echo "<testcase classname='libpayload' name='$$i'>" >> $@.tmp; \
@@ -146,6 +147,7 @@ junit.xml:
 		echo "</testcase>" >> $@.tmp; \
 	done
 	echo "</testsuite>" >> $@.tmp
+	echo "libpayload build complete, test results in $@"
 	mv $@.tmp $@
 
 test-configs:

payloads/libpayload/drivers/usb/dwc2.c

@@ -146,6 +146,8 @@ static int dwc2_disconnected(hci_t *controller)
 	return !(hprt.prtena && hprt.prtconnsts);
 }
 
+#define DWC2_SLEEP_TIME_US	5
+
 /*
  * This function returns the actual transfer length when the transfer succeeded
  * or an error code if the transfer failed
@@ -157,14 +159,14 @@ wait_for_complete(endpoint_t *ep, uint32_t ch_num)
 	hcchar_t hcchar;
 	hctsiz_t hctsiz;
 	dwc2_reg_t *reg = DWC2_REG(ep->dev->controller);
-	int timeout = 600000; /* time out after 600000 * 5us == 3s */
+	int timeout = USB_MAX_PROCESSING_TIME_US / DWC2_SLEEP_TIME_US;
 
 	/*
 	 * TODO: We should take care of up to three times of transfer error
 	 * retry here, according to the USB 2.0 spec 4.5.2
 	 */
 	do {
-		udelay(5);
+		udelay(DWC2_SLEEP_TIME_US);
 		hcint.d32 = readl(&reg->host.hchn[ch_num].hcintn);
 		hctsiz.d32 = readl(&reg->host.hchn[ch_num].hctsizn);
 
@@ -374,12 +376,15 @@ static int dwc2_need_split(usbdev_t *dev, split_info_t *split)
 	return 1;
 }
 
+#define USB_FULL_LOW_SPEED_FRAME_US		1000
+
 static int
 dwc2_transfer(endpoint_t *ep, int size, int pid, ep_dir_t dir, uint32_t ch_num,
 	      u8 *src, uint8_t skip_nak)
 {
 	split_info_t split;
-	int ret, short_pkt, transferred = 0, timeout = 3000;
+	int ret, short_pkt, transferred = 0;
+	int timeout = USB_MAX_PROCESSING_TIME_US / USB_FULL_LOW_SPEED_FRAME_US;
 
 	ep->toggle = pid;
 
@@ -393,11 +398,11 @@ nak_retry:
 
 			/*
 			 * dwc2_split_transfer() waits for the next FullSpeed
-			 * frame boundary, so we have one try per millisecond.
-			 * It's 3s timeout for each split transfer.
+			 * frame boundary, so we only need to delay 500 us
+			 * here to have one try per millisecond.
 			 */
 			if (ret == -HCSTAT_NAK && !skip_nak && --timeout) {
-				udelay(500);
+				udelay(USB_FULL_LOW_SPEED_FRAME_US / 2);
 				goto nak_retry;
 			}
 		} else {

payloads/libpayload/drivers/usb/ehci.c

@@ -247,6 +247,8 @@ static void free_qh_and_tds(ehci_qh_t *qh, qtd_t *cur)
 	free((void *)qh);
 }
 
+#define EHCI_SLEEP_TIME_US	50
+
 static int wait_for_tds(qtd_t *head)
 {
 	/* returns the amount of bytes *not* transmitted, or -1 for error */
@@ -256,18 +258,10 @@ static int wait_for_tds(qtd_t *head)
 		if (0) dump_td(virt_to_phys(cur));
 
 		/* wait for results */
-		/* how long to wait?
-		 * tested with some USB2.0 flash sticks:
-		 * TUR turn around took
-		 *   about 2.2s for the slowest (13fe:3800)
-		 *   max. 250ms for the others
-		 * slowest non-TUR turn around took about 1.3s
-		 * set to 3s to be safe as a failed TUR can be fatal
-		 */
-		int timeout = 60000; /* time out after 60000 * 50us == 3s */
+		int timeout = USB_MAX_PROCESSING_TIME_US / EHCI_SLEEP_TIME_US;
 		while ((cur->token & QTD_ACTIVE) && !(cur->token & QTD_HALTED)
 				&& timeout--)
-			udelay(50);
+			udelay(EHCI_SLEEP_TIME_US);
 		if (timeout < 0) {
 			usb_debug("Error: ehci: queue transfer "
 				"processing timed out.\n");

payloads/libpayload/drivers/usb/ohci.c

@@ -292,14 +292,13 @@ ohci_stop (hci_t *controller)
 	OHCI_INST (controller)->opreg->HcControl &= ~PeriodicListEnable;
 }
 
+#define OHCI_SLEEP_TIME_US	1000
+
 static int
 wait_for_ed(usbdev_t *dev, ed_t *head, int pages)
 {
 	/* wait for results */
-	/* TOTEST: how long to wait?
-	 *         give 2s per TD (2 pages) plus another 2s for now
-	 */
-	int timeout = pages*1000 + 2000;
+	int timeout = USB_MAX_PROCESSING_TIME_US / OHCI_SLEEP_TIME_US;
 	while (((head->head_pointer & ~3) != head->tail_pointer) &&
 		!(head->head_pointer & 1) &&
 		((((td_t*)phys_to_virt(head->head_pointer & ~3))->config
@@ -315,9 +314,9 @@ wait_for_ed(usbdev_t *dev, ed_t *head, int pages)
 			((td_t*)phys_to_virt(head->head_pointer & ~3))->next_td,
 			head->tail_pointer,
 			(((td_t*)phys_to_virt(head->head_pointer & ~3))->config & TD_CC_MASK) >> TD_CC_SHIFT);
-		mdelay(1);
+		udelay(OHCI_SLEEP_TIME_US);
 	}
-	if (timeout < 0)
+	if (timeout <= 0)
 		usb_debug("Error: ohci: endpoint "
 			"descriptor processing timed out.\n");
 	/* Clear the done queue. */

payloads/libpayload/drivers/usb/uhci.c

@@ -272,21 +272,23 @@ uhci_stop (hci_t *controller)
 			 uhci_reg_read16(controller, USBCMD) & ~1);	// stop work on schedule
 }
 
+#define UHCI_SLEEP_TIME_US 30
+#define UHCI_TIMEOUT (USB_MAX_PROCESSING_TIME_US / UHCI_SLEEP_TIME_US)
 #define GET_TD(x) ((void*)(((unsigned int)(x))&~0xf))
 
 static td_t *
 wait_for_completed_qh (hci_t *controller, qh_t *qh)
 {
-	int timeout = 1000;	/* max 30 ms. */
+	int timeout = UHCI_TIMEOUT;
 	void *current = GET_TD (qh->elementlinkptr);
 	while (((qh->elementlinkptr & FLISTP_TERMINATE) == 0) && (timeout-- > 0)) {
 		if (current != GET_TD (qh->elementlinkptr)) {
 			current = GET_TD (qh->elementlinkptr);
-			timeout = 1000;
+			timeout = UHCI_TIMEOUT;
 		}
 		uhci_reg_write16(controller, USBSTS,
 				 uhci_reg_read16(controller, USBSTS) | 0);	// clear resettable registers
-		udelay (30);
+		udelay(UHCI_SLEEP_TIME_US);
 	}
 	return (GET_TD (qh->elementlinkptr) ==
 		0) ? 0 : GET_TD (phys_to_virt (qh->elementlinkptr));

payloads/libpayload/drivers/usb/xhci_events.c

@@ -236,7 +236,7 @@ xhci_wait_for_command_aborted(xhci_t *const xhci, const trb_t *const address)
 	 * we don't get a response after 5s. Still, let the caller decide,
 	 * what to do then.
 	 */
-	unsigned long timeout_us = 5 * 1000 * 1000; /* 5s */
+	unsigned long timeout_us = USB_MAX_PROCESSING_TIME_US; /* 5s */
 	int cc = TIMEOUT;
 	/*
 	 * Expects two command completion events:
@@ -280,13 +280,7 @@ xhci_wait_for_command_done(xhci_t *const xhci,
 			   const trb_t *const address,
 			   const int clear_event)
 {
-	/*
-	 * The Address Device Command should take most time, as it has to
-	 * communicate with the USB device. Set address processing shouldn't
-	 * take longer than 50ms (at the slave). Let's take a timeout of
-	 * 100ms.
-	 */
-	unsigned long timeout_us = 100 * 1000; /* 100ms */
+	unsigned long timeout_us = USB_MAX_PROCESSING_TIME_US; /* 5s */
 	int cc = TIMEOUT;
 	while (xhci_wait_for_event_type(xhci, TRB_EV_CMD_CMPL, &timeout_us)) {
 		if ((xhci->er.cur->ptr_low == virt_to_phys(address)) &&
@@ -311,8 +305,8 @@ int
 xhci_wait_for_transfer(xhci_t *const xhci, const int slot_id, const int ep_id)
 {
 	xhci_spew("Waiting for transfer on ID %d EP %d\n", slot_id, ep_id);
-	/* 3s for all types of transfers */ /* TODO: test, wait longer? */
-	unsigned long timeout_us = 3 * 1000 * 1000;
+	/* 5s for all types of transfers */
+	unsigned long timeout_us = USB_MAX_PROCESSING_TIME_US;
 	int ret = TIMEOUT;
 	while (xhci_wait_for_event_type(xhci, TRB_EV_TRANSFER, &timeout_us)) {
 		if (TRB_GET(ID, xhci->er.cur) == slot_id &&

payloads/libpayload/include/usb/usb.h

@@ -71,6 +71,24 @@ typedef enum {
 /* SetAddress() recovery interval (USB 2.0 specification 9.2.6.3 */
 #define SET_ADDRESS_MDELAY 2
 
+/*
+ * USB sets an upper limit of 5 seconds for any transfer to be completed.
+ *
+ * Data originally from EHCI driver:
+ *	Tested with some USB2.0 flash sticks:
+ *	TUR turn around took  about 2.2s for the slowest (13fe:3800), maximum
+ *	of 250ms for the others.
+ *
+ * SET ADDRESS on xHCI controllers.
+ *	The USB specification indicates that devices must complete processing
+ *	of a SET ADDRESS request within 50 ms.  However, some hubs were found
+ *	to take more than 100 ms to complete a SET ADDRESS request on a
+ *	downstream port.
+ */
+#define USB_MAX_PROCESSING_TIME_US (5 * 1000 * 1000)
+
+#define USB_FULL_LOW_SPEED_FRAME_US 1000
+
 typedef struct {
 	unsigned char bDescLength;
 	unsigned char bDescriptorType;

src/Kconfig

@@ -241,7 +241,6 @@ config NO_RELOCATABLE_RAMSTAGE
 
 config RELOCATABLE_RAMSTAGE
 	bool
-	depends on HAVE_RAMSTAGE
 	default !NO_RELOCATABLE_RAMSTAGE
 	select RELOCATABLE_MODULES
 	help
@@ -501,14 +500,20 @@ config HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK
 	bool
 	default n
 
-config HAVE_MONOTONIC_TIMER
+config NO_MONOTONIC_TIMER
 	def_bool n
+
+config HAVE_MONOTONIC_TIMER
+	bool
+	depends on !NO_MONOTONIC_TIMER
+	default y
 	help
 	 The board/chipset provides a monotonic timer.
 
 config GENERIC_UDELAY
-	def_bool n
+	bool
 	depends on HAVE_MONOTONIC_TIMER
+	default y if !ARCH_X86
 	help
 	 The board/chipset uses a generic udelay function utilizing the
 	 monotonic timer.
@@ -543,14 +548,6 @@ config HAVE_OPTION_TABLE
 	  file containing NVRAM/CMOS bit definitions.
 	  It defaults to 'n' but can be selected in mainboard/*/Kconfig.
 
-config PIRQ_ROUTE
-	bool
-	default n
-
-config HAVE_SMI_HANDLER
-	bool
-	default n
-
 config PCI_IO_CFG_EXT
 	bool
 	default n
@@ -591,17 +588,6 @@ config HAVE_PIRQ_TABLE
 	  Whether or not the PIRQ table is actually generated by coreboot
 	  is configurable by the user via GENERATE_PIRQ_TABLE.
 
-config MAX_PIRQ_LINKS
-	int
-	default 4
-	help
-	  This variable specifies the number of PIRQ interrupt links which are
-	  routable. On most chipsets, this is 4, INTA through INTD. Some
-	  chipsets offer more than four links, commonly up to INTH. They may
-	  also have a separate link for ATA or IOAPIC interrupts. When the PIRQ
-	  table specifies links greater than 4, pirq_route_irqs will not
-	  function properly, unless this variable is correctly set.
-
 config COMMON_FADT
 	bool
 	default n

src/arch/arm/armv7/mmu.c

@@ -165,7 +165,7 @@ static pte_t *mmu_create_subtable(pte_t *pgd_entry)
 
 	/* We assume that *pgd_entry must already be a valid block mapping. */
 	uintptr_t start_addr = (uintptr_t)(*pgd_entry & BLOCK_MASK);
-	printk(BIOS_DEBUG, "Creating new subtable @%p for [%#.8x:%#.8lx)\n",
+	printk(BIOS_DEBUG, "Creating new subtable @%p for [%#.8lx:%#.8lx)\n",
 	       table, start_addr, start_addr + BLOCK_SIZE);
 
 	/* Initialize the new subtable with entries of the same attributes

src/arch/arm/include/stdint.h

@@ -1,110 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef ARM_STDINT_H
-#define ARM_STDINT_H
-
-#if defined(__GNUC__)
-#define __HAVE_LONG_LONG__ 1
-#else
-#define __HAVE_LONG_LONG__ 0
-#endif
-
-/* Exact integral types */
-typedef unsigned char      uint8_t;
-typedef signed char        int8_t;
-
-typedef unsigned short     uint16_t;
-typedef signed short       int16_t;
-
-typedef unsigned int       uint32_t;
-typedef signed int         int32_t;
-
-#if __HAVE_LONG_LONG__
-typedef unsigned long long uint64_t;
-typedef signed long long   int64_t;
-#endif
-
-/* Small types */
-typedef unsigned char      uint_least8_t;
-typedef signed char        int_least8_t;
-
-typedef unsigned short     uint_least16_t;
-typedef signed short       int_least16_t;
-
-typedef unsigned int       uint_least32_t;
-typedef signed int         int_least32_t;
-
-#if __HAVE_LONG_LONG__
-typedef unsigned long long uint_least64_t;
-typedef signed long long   int_least64_t;
-#endif
-
-/* Fast Types */
-typedef unsigned char      uint_fast8_t;
-typedef signed char        int_fast8_t;
-
-typedef unsigned int       uint_fast16_t;
-typedef signed int         int_fast16_t;
-
-typedef unsigned int       uint_fast32_t;
-typedef signed int         int_fast32_t;
-
-#if __HAVE_LONG_LONG__
-typedef unsigned long long uint_fast64_t;
-typedef signed long long   int_fast64_t;
-#endif
-
-/* Types for `void *' pointers.  */
-typedef int                intptr_t;
-typedef unsigned int       uintptr_t;
-
-/* Largest integral types */
-#if __HAVE_LONG_LONG__
-typedef long long int      intmax_t;
-typedef unsigned long long uintmax_t;
-#else
-typedef long int           intmax_t;
-typedef unsigned long int  uintmax_t;
-#endif
-
-typedef uint8_t u8;
-typedef uint16_t u16;
-typedef uint32_t u32;
-#if __HAVE_LONG_LONG__
-typedef uint64_t u64;
-#endif
-typedef int8_t s8;
-typedef int16_t s16;
-typedef int32_t s32;
-
-typedef uint8_t bool;
-#define true	1
-#define false	0
-
-#ifndef UINT32_MAX
-#define UINT32_MAX (4294967295U)
-#endif
-#ifndef UINT64_MAX
-# define UINT64_MAX (18446744073709551615ULL)
-#endif
-#ifndef UINT64_C
-#define UINT64_C(c) c ## ULL
-#endif
-#ifndef PRIu64
-#define PRIu64 "llu"
-#endif
-
-#undef __HAVE_LONG_LONG__
-
-#endif /* ARM_STDINT_H */

src/arch/arm64/include/stdint.h

@@ -1,86 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef ARM64_STDINT_H
-#define ARM64_STDINT_H
-
-/* Exact integral types */
-typedef unsigned char      uint8_t;
-typedef signed char        int8_t;
-
-typedef unsigned short     uint16_t;
-typedef signed short       int16_t;
-
-typedef unsigned int       uint32_t;
-typedef signed int         int32_t;
-
-typedef unsigned long long uint64_t;
-typedef signed long long   int64_t;
-
-/* Small types */
-typedef unsigned char      uint_least8_t;
-typedef signed char        int_least8_t;
-
-typedef unsigned short     uint_least16_t;
-typedef signed short       int_least16_t;
-
-typedef unsigned int       uint_least32_t;
-typedef signed int         int_least32_t;
-
-typedef unsigned long long uint_least64_t;
-typedef signed long long   int_least64_t;
-
-/* Fast Types */
-typedef unsigned char      uint_fast8_t;
-typedef signed char        int_fast8_t;
-
-typedef unsigned int       uint_fast16_t;
-typedef signed int         int_fast16_t;
-
-typedef unsigned int       uint_fast32_t;
-typedef signed int         int_fast32_t;
-
-typedef unsigned long long uint_fast64_t;
-typedef signed long long   int_fast64_t;
-
-typedef long long int      intmax_t;
-typedef unsigned long long uintmax_t;
-
-typedef uint8_t u8;
-typedef uint16_t u16;
-typedef uint32_t u32;
-typedef uint64_t u64;
-typedef int8_t s8;
-typedef int16_t s16;
-typedef int32_t s32;
-typedef int64_t s64;
-
-typedef uint8_t bool;
-#define true	1
-#define false	0
-
-/* Types for `void *' pointers.  */
-typedef s64             intptr_t;
-typedef u64		uintptr_t;
-
-#ifndef UINT32_MAX
-#define UINT32_MAX (4294967295U)
-#endif
-#ifndef UINT64_MAX
-# define UINT64_MAX (18446744073709551615ULL)
-#endif
-#ifndef PRIu64
-#define PRIu64 "llu"
-#endif
-
-#endif /* ARM64_STDINT_H */

src/arch/mips/Kconfig

@@ -16,12 +16,12 @@
 
 config ARCH_MIPS
 	bool
-	default n
+
+if ARCH_MIPS
 
 config ARCH_BOOTBLOCK_MIPS
 	bool
 	default n
-	select ARCH_MIPS
 	select BOOTBLOCK_CUSTOM
 	select C_ENVIRONMENT_BOOTBLOCK
 
@@ -36,3 +36,5 @@ config ARCH_ROMSTAGE_MIPS
 config ARCH_RAMSTAGE_MIPS
 	bool
 	default n
+
+endif # if ARCH_MIPS

src/arch/mips/include/stdint.h

@@ -1,100 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Based on src/arch/armv7/include/stdint.h
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef __MIPS_STDINT_H
-#define __MIPS_STDINT_H
-
-#if defined(__GNUC__)
-#define __HAVE_LONG_LONG__ 1
-#else
-#define __HAVE_LONG_LONG__ 0
-#endif
-
-/* Exact integral types */
-typedef unsigned char      uint8_t;
-typedef signed char        int8_t;
-
-typedef unsigned short     uint16_t;
-typedef signed short       int16_t;
-
-typedef unsigned int       uint32_t;
-typedef signed int         int32_t;
-
-#if __HAVE_LONG_LONG__
-typedef unsigned long long uint64_t;
-typedef signed long long   int64_t;
-#endif
-
-/* Small types */
-typedef unsigned char      uint_least8_t;
-typedef signed char        int_least8_t;
-
-typedef unsigned short     uint_least16_t;
-typedef signed short       int_least16_t;
-
-typedef unsigned int       uint_least32_t;
-typedef signed int         int_least32_t;
-
-#if __HAVE_LONG_LONG__
-typedef unsigned long long uint_least64_t;
-typedef signed long long   int_least64_t;
-#endif
-
-/* Fast Types */
-typedef unsigned char      uint_fast8_t;
-typedef signed char        int_fast8_t;
-
-typedef unsigned int       uint_fast16_t;
-typedef signed int         int_fast16_t;
-
-typedef unsigned int       uint_fast32_t;
-typedef signed int         int_fast32_t;
-
-#if __HAVE_LONG_LONG__
-typedef unsigned long long uint_fast64_t;
-typedef signed long long   int_fast64_t;
-#endif
-
-/* Types for `void *' pointers.  */
-typedef int                intptr_t;
-typedef unsigned int       uintptr_t;
-
-/* Largest integral types */
-#if __HAVE_LONG_LONG__
-typedef long long int      intmax_t;
-typedef unsigned long long uintmax_t;
-#else
-typedef long int           intmax_t;
-typedef unsigned long int  uintmax_t;
-#endif
-
-typedef uint8_t u8;
-typedef uint16_t u16;
-typedef uint32_t u32;
-#if __HAVE_LONG_LONG__
-typedef uint64_t u64;
-#endif
-typedef int8_t s8;
-typedef int16_t s16;
-typedef int32_t s32;
-
-typedef uint8_t bool;
-#define true	1
-#define false	0
-
-
-#undef __HAVE_LONG_LONG__
-
-#endif /* __MIPS_STDINT_H */

src/arch/ppc64/include/stdint.h

@@ -1,76 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef PPC64_STDINT_H
-#define PPC64_STDINT_H
-
-/* Exact integral types */
-typedef unsigned char      uint8_t;
-typedef signed char        int8_t;
-
-typedef unsigned short     uint16_t;
-typedef signed short       int16_t;
-
-typedef unsigned int       uint32_t;
-typedef signed int         int32_t;
-
-typedef unsigned long long uint64_t;
-typedef signed long long   int64_t;
-
-/* Small types */
-typedef unsigned char      uint_least8_t;
-typedef signed char        int_least8_t;
-
-typedef unsigned short     uint_least16_t;
-typedef signed short       int_least16_t;
-
-typedef unsigned int       uint_least32_t;
-typedef signed int         int_least32_t;
-
-typedef unsigned long long uint_least64_t;
-typedef signed long long   int_least64_t;
-
-/* Fast Types */
-typedef unsigned char      uint_fast8_t;
-typedef signed char        int_fast8_t;
-
-typedef unsigned int       uint_fast16_t;
-typedef signed int         int_fast16_t;
-
-typedef unsigned int       uint_fast32_t;
-typedef signed int         int_fast32_t;
-
-typedef unsigned long long uint_fast64_t;
-typedef signed long long   int_fast64_t;
-
-typedef long long int      intmax_t;
-typedef unsigned long long uintmax_t;
-
-typedef uint8_t u8;
-typedef uint16_t u16;
-typedef uint32_t u32;
-typedef uint64_t u64;
-typedef int8_t s8;
-typedef int16_t s16;
-typedef int32_t s32;
-typedef int64_t s64;
-
-typedef uint8_t bool;
-#define true	1
-#define false	0
-
-/* Types for `void *' pointers.  */
-typedef s64             intptr_t;
-typedef u64		uintptr_t;
-
-#endif /* PPC64_STDINT_H */

src/arch/riscv/Kconfig

@@ -1,6 +1,15 @@
+config ARCH_RISCV_RV64
+	bool
+	select ARCH_RISCV
+
+config ARCH_RISCV_RV32
+	bool
+	select ARCH_RISCV
+
 config ARCH_RISCV
 	bool
-	default n
+
+if ARCH_RISCV
 
 config RISCV_ARCH
 	string
@@ -37,16 +46,6 @@ config ARCH_RISCV_U
 	bool
 	default n
 
-config ARCH_RISCV_RV64
-	bool
-	default n
-	select ARCH_RISCV
-
-config ARCH_RISCV_RV32
-	bool
-	default n
-	select ARCH_RISCV
-
 config ARCH_RISCV_PMP
 	bool
 	default n
@@ -74,3 +73,5 @@ config RISCV_USE_ARCH_TIMER
 
 config RISCV_WORKING_HARTID
 	int
+
+endif # if ARCH_RISCV

src/arch/riscv/include/stdint.h

@@ -1,79 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef RISCV_STDINT_H
-#define RISCV_STDINT_H
-
-/* Exact integral types */
-typedef unsigned char      uint8_t;
-typedef signed char        int8_t;
-
-typedef unsigned short     uint16_t;
-typedef signed short       int16_t;
-
-typedef unsigned int       uint32_t;
-typedef signed int         int32_t;
-
-typedef unsigned long long uint64_t;
-typedef signed long long   int64_t;
-
-/* Small types */
-typedef unsigned char      uint_least8_t;
-typedef signed char        int_least8_t;
-
-typedef unsigned short     uint_least16_t;
-typedef signed short       int_least16_t;
-
-typedef unsigned int       uint_least32_t;
-typedef signed int         int_least32_t;
-
-typedef unsigned long long uint_least64_t;
-typedef signed long long   int_least64_t;
-
-/* Fast Types */
-typedef unsigned char      uint_fast8_t;
-typedef signed char        int_fast8_t;
-
-typedef unsigned int       uint_fast16_t;
-typedef signed int         int_fast16_t;
-
-typedef unsigned int       uint_fast32_t;
-typedef signed int         int_fast32_t;
-
-typedef unsigned long long uint_fast64_t;
-typedef signed long long   int_fast64_t;
-
-typedef long long int      intmax_t;
-typedef unsigned long long uintmax_t;
-
-typedef uint8_t u8;
-typedef uint16_t u16;
-typedef uint32_t u32;
-typedef uint64_t u64;
-typedef int8_t s8;
-typedef int16_t s16;
-typedef int32_t s32;
-typedef int64_t s64;
-
-typedef uint8_t bool;
-#define true	1
-#define false	0
-
-/* Types for `void *' pointers.  */
-typedef long intptr_t;
-typedef unsigned long uintptr_t;
-
-/* FIXME: This is used in some print code and may be removed in the future. */
-#define PRIu64  "llu"
-
-#endif /* RISCV_STDINT_H */

src/arch/x86/Kconfig

@@ -329,3 +329,19 @@ config HAVE_CF9_RESET
 config HAVE_CF9_RESET_PREPARE
 	bool
 	depends on HAVE_CF9_RESET
+
+config PIRQ_ROUTE
+	bool
+	default n
+
+config MAX_PIRQ_LINKS
+	int
+	default 4
+	depends on PIRQ_ROUTE
+	help
+	  This variable specifies the number of PIRQ interrupt links which are
+	  routable. On most chipsets, this is 4, INTA through INTD. Some
+	  chipsets offer more than four links, commonly up to INTH. They may
+	  also have a separate link for ATA or IOAPIC interrupts. When the PIRQ
+	  table specifies links greater than 4, pirq_route_irqs will not
+	  function properly, unless this variable is correctly set.

src/arch/x86/Makefile.inc

@@ -404,8 +404,6 @@ smm-y += memmove.c
 smm-y += memset.c
 smm-$(CONFIG_X86_TOP4G_BOOTMEDIA_MAP) += mmap_boot.c
 
-ifeq ($(CONFIG_HAVE_SMI_HANDLER),y)
 ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/smihandler.c),)
 smm-srcs += src/mainboard/$(MAINBOARDDIR)/smihandler.c
 endif
-endif

src/arch/x86/acpi.c

@@ -763,11 +763,14 @@ void acpi_create_vfct(struct device *device,
 	memcpy(header->asl_compiler_id, ASLC, 4);
 
 	header->asl_compiler_revision = asl_revision;
-	header->length = sizeof(struct acpi_vfct);
 	header->revision = get_acpi_table_revision(VFCT);
 
 	current = acpi_fill_vfct(device, vfct, current);
 
+	/* If no BIOS image, return with header->length == 0. */
+	if (!vfct->VBIOSImageOffset)
+		return;
+
 	/* (Re)calculate length and checksum. */
 	header->length = current - (unsigned long)vfct;
 	header->checksum = acpi_checksum((void *)vfct, header->length);

src/arch/x86/acpi_device.c

@@ -148,7 +148,7 @@ const char *acpi_device_scope(struct device *dev)
 const char *acpi_device_path_join(struct device *dev, const char *name)
 {
 	static char buf[DEVICE_PATH_MAX] = {};
-	size_t len;
+	ssize_t len;
 
 	if (!dev)
 		return NULL;

src/arch/x86/acpigen.c

@@ -1115,7 +1115,7 @@ void acpigen_write_uuid(const char *uuid)
 void acpigen_write_power_res(const char *name, uint8_t level, uint16_t order,
 			     const char *dev_states[], size_t dev_states_count)
 {
-	int i;
+	size_t i;
 	for (i = 0; i < dev_states_count; i++) {
 		acpigen_write_name(dev_states[i]);
 		acpigen_write_package(1);

src/arch/x86/cpu_common.c

@@ -49,7 +49,7 @@ int cpu_have_cpuid(void)
 }
 #endif
 
-int cpu_cpuid_extended_level(void)
+unsigned int cpu_cpuid_extended_level(void)
 {
 	return cpuid_eax(0x80000000);
 }

src/arch/x86/include/arch/bert_storage.h

@@ -67,7 +67,7 @@ size_t bert_storage_remaining(void);
 /* Find if errors were added, a BERT region is present, and ACPI table needed */
 int bert_errors_present(void);
 
-/* Get the number of entries accociated with status */
+/* Get the number of entries associated with status */
 static inline size_t bert_entry_count(acpi_generic_error_status_t *status)
 {
 	return (status->block_status & GENERIC_ERR_STS_ENTRY_COUNT_MASK)

src/arch/x86/include/arch/cpu.h

@@ -200,17 +200,19 @@ static inline unsigned int cpuid_edx(unsigned int op)
 #define CPUID_CACHE_NO_OF_SETS_MASK 0xffffffff
 #define CPUID_CACHE_NO_OF_SETS(res) CPUID_CACHE(NO_OF_SETS, (res).ecx)
 
-int cpu_cpuid_extended_level(void);
+unsigned int cpu_cpuid_extended_level(void);
 int cpu_have_cpuid(void);
 
+/* Only with !PARALLEL_MP. */
 void smm_init(void);
 void smm_init_completion(void);
-void smm_lock(void);
+
 void smm_setup_structures(void *gnvs, void *tcg, void *smi1);
 
 static inline bool cpu_is_amd(void)
 {
-	return CONFIG(CPU_AMD_AGESA) || CONFIG(CPU_AMD_PI);
+	return CONFIG(CPU_AMD_AGESA) || CONFIG(CPU_AMD_PI)
+			|| CONFIG(SOC_AMD_COMMON) || CONFIG(CPU_AMD_MODEL_10XXX);
 }
 
 static inline bool cpu_is_intel(void)
@@ -309,8 +311,9 @@ struct postcar_frame {
 };
 
 /*
- * Initialize postcar_frame object allocating stack size in cbmem
- * with the provided size. Returns 0 on success, < 0 on error.
+ * Initialize postcar_frame object allocating stack from cbmem,
+ * with stack_size == 0, default 4 KiB is allocated.
+ * Returns 0 on success, < 0 on error.
  */
 int postcar_frame_init(struct postcar_frame *pcf, size_t stack_size);
 

src/arch/x86/include/arch/memory_clear.h

@@ -1,6 +1,9 @@
 /*
  * This file is part of the coreboot project.
  *
+ * Copyright (C) 2019 9elements Agency GmbH
+ * Copyright (C) 2019 Facebook Inc.
+ *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; version 2 of the License.
@@ -11,16 +14,11 @@
  * GNU General Public License for more details.
  */
 
-#ifndef E7505_DEBUG_H
-#define E7505_DEBUG_H
+#ifndef MEMORY_CLEAR_H
+#define MEMORY_CLEAR_H
 
-void print_debug_pci_dev(unsigned dev);
-void print_pci_devices(void);
-void dump_pci_device(unsigned dev);
-void dump_pci_devices(void);
-void dump_pci_devices_on_bus(unsigned busn);
-void dump_spd_registers(const struct mem_controller *ctrl);
-void dump_smbus_registers(void);
-void dump_io_resources(unsigned port);
+#include <memrange.h>
 
-#endif
+int arch_clear_memranges(const struct memranges *mem_reserved);
+
+#endif /* MEMORY_CLEAR_H */

src/arch/x86/include/stdint.h

@@ -1,113 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef X86_STDINT_H
-#define X86_STDINT_H
-
-#if defined(__GNUC__)
-#define __HAVE_LONG_LONG__ 1
-#else
-#define __HAVE_LONG_LONG__ 0
-#endif
-
-/* Exact integral types */
-typedef unsigned char      uint8_t;
-typedef signed char        int8_t;
-
-typedef unsigned short     uint16_t;
-typedef signed short       int16_t;
-
-typedef unsigned int       uint32_t;
-typedef signed int         int32_t;
-
-#if __HAVE_LONG_LONG__
-typedef unsigned long long uint64_t;
-typedef signed long long   int64_t;
-#endif
-
-/* Small types */
-typedef unsigned char      uint_least8_t;
-typedef signed char        int_least8_t;
-
-typedef unsigned short     uint_least16_t;
-typedef signed short       int_least16_t;
-
-typedef unsigned int       uint_least32_t;
-typedef signed int         int_least32_t;
-
-#if __HAVE_LONG_LONG__
-typedef unsigned long long uint_least64_t;
-typedef signed long long   int_least64_t;
-#endif
-
-/* Fast Types */
-typedef unsigned char      uint_fast8_t;
-typedef signed char        int_fast8_t;
-
-typedef unsigned int       uint_fast16_t;
-typedef signed int         int_fast16_t;
-
-typedef unsigned int       uint_fast32_t;
-typedef signed int         int_fast32_t;
-
-#if __HAVE_LONG_LONG__
-typedef unsigned long long uint_fast64_t;
-typedef signed long long   int_fast64_t;
-#endif
-
-/* Types for `void *' pointers.  */
-typedef long               intptr_t;
-typedef unsigned long      uintptr_t;
-
-/* Largest integral types */
-#if __HAVE_LONG_LONG__
-typedef long long int      intmax_t;
-typedef unsigned long long uintmax_t;
-#else
-typedef long int           intmax_t;
-typedef unsigned long int  uintmax_t;
-#endif
-
-typedef uint8_t u8;
-typedef uint16_t u16;
-typedef uint32_t u32;
-#if __HAVE_LONG_LONG__
-typedef uint64_t u64;
-#endif
-typedef int8_t s8;
-typedef int16_t s16;
-typedef int32_t s32;
-
-typedef uint8_t bool;
-#define true	1
-#define false	0
-
-#ifndef UINT32_MAX
-#define UINT32_MAX (4294967295U)
-#endif
-#ifndef UINT64_MAX
-# define UINT64_MAX (18446744073709551615ULL)
-#endif
-
-#ifndef UINT64_C
-#define UINT64_C(c) c ## ULL
-#endif
-#ifndef PRIu64
-#define PRIu64 "llu"
-
-#endif
-
-
-#undef __HAVE_LONG_LONG__
-
-#endif /* X86_STDINT_H */

src/arch/x86/pirq_routing.c

@@ -20,10 +20,6 @@
 #include <string.h>
 #include <device/pci.h>
 
-void __weak pirq_assign_irqs(const unsigned char pirq[CONFIG_MAX_PIRQ_LINKS])
-{
-}
-
 static void check_pirq_routing_table(struct irq_routing_table *rt)
 {
 	uint8_t *addr = (uint8_t *)rt;
@@ -146,8 +142,11 @@ static void pirq_route_irqs(unsigned long addr)
 	/* Set PCI IRQs. */
 	for (i = 0; i < num_entries; i++) {
 
+		u8 bus = pirq_tbl->slots[i].bus;
+		u8 devfn = pirq_tbl->slots[i].devfn;
+
 		printk(BIOS_DEBUG, "PIRQ Entry %d Dev/Fn: %X Slot: %d\n", i,
-			pirq_tbl->slots[i].devfn >> 3, pirq_tbl->slots[i].slot);
+			devfn >> 3, pirq_tbl->slots[i].slot);
 
 		for (intx = 0; intx < MAX_INTX_ENTRIES; intx++) {
 
@@ -178,8 +177,7 @@ static void pirq_route_irqs(unsigned long addr)
 		}
 
 		/* Bus, device, slots IRQs for {A,B,C,D}. */
-		pci_assign_irqs(pirq_tbl->slots[i].bus,
-			pirq_tbl->slots[i].devfn >> 3, irq_slot);
+		pci_assign_irqs(pcidev_path_on_bus(bus, devfn), irq_slot);
 	}
 
 	for (i = 0; i < CONFIG_MAX_PIRQ_LINKS; i++)

src/arch/x86/postcar_loader.c

@@ -48,6 +48,15 @@ int postcar_frame_init(struct postcar_frame *pcf, size_t stack_size)
 {
 	void *stack;
 
+	/*
+	 * Use default postcar stack size of 4 KiB. This value should
+	 * not be decreased, because if mainboards use vboot, 1 KiB will
+	 * not be enough anymore.
+	 */
+
+	if (stack_size == 0)
+		stack_size = 4 * KiB;
+
 	stack = cbmem_add(CBMEM_ID_ROMSTAGE_RAM_STACK, stack_size);
 	if (stack == NULL) {
 		printk(BIOS_ERR, "Couldn't add %zd byte stack in cbmem.\n",

src/console/Kconfig

@@ -79,13 +79,13 @@ config TTYS0_BASE
 	  Map the COM port number to the respective I/O port.
 
 comment "Serial port base address = 0x3f8"
-depends on UART_FOR_CONSOLE = 0
+depends on DRIVERS_UART_8250IO && UART_FOR_CONSOLE = 0
 comment "Serial port base address = 0x2f8"
-depends on UART_FOR_CONSOLE = 1
+depends on DRIVERS_UART_8250IO && UART_FOR_CONSOLE = 1
 comment "Serial port base address = 0x3e8"
-depends on UART_FOR_CONSOLE = 2
+depends on DRIVERS_UART_8250IO && UART_FOR_CONSOLE = 2
 comment "Serial port base address = 0x2e8"
-depends on UART_FOR_CONSOLE = 3
+depends on DRIVERS_UART_8250IO && UART_FOR_CONSOLE = 3
 
 config UART_OVERRIDE_BAUDRATE
 	boolean

src/console/Makefile.inc

@@ -8,8 +8,8 @@ ramstage-$(CONFIG_RAMSTAGE_LIBHWBASE) += hw-debug_sink.adb
 endif
 
 smm-$(CONFIG_DEBUG_SMI) += init.c console.c vtxprintf.c printk.c
-smm-$(CONFIG_SMM_TSEG) += die.c
-smm-$(CONFIG_SMM_TSEG) += post.c
+smm-y += die.c
+smm-y += post.c
 
 verstage-y += init.c
 verstage-y += printk.c

src/console/vtxprintf.c

@@ -18,6 +18,7 @@
 #include <console/vtxprintf.h>
 #include <ctype.h>
 #include <string.h>
+#include <stdint.h>
 
 #define call_tx(x) tx_byte(x, data)
 
@@ -38,7 +39,7 @@ static int number(void (*tx_byte)(unsigned char byte, void *data),
 	void *data)
 {
 	char c, sign, tmp[66];
-	const char *digits = "0123456789abcdefghijklmnopqrstuvwxyz";
+	const char *digits = "0123456789abcdef";
 	int i;
 	int count = 0;
 #ifdef SUPPORT_64BIT_INTS
@@ -57,11 +58,9 @@ static int number(void (*tx_byte)(unsigned char byte, void *data),
 #endif
 
 	if (type & LARGE)
-		digits = "0123456789ABCDEFGHIJKLMNOPQRSTUVWXYZ";
+		digits = "0123456789ABCDEF";
 	if (type & LEFT)
 		type &= ~ZEROPAD;
-	if (base < 2 || base > 36)
-		return 0;
 	c = (type & ZEROPAD) ? '0' : ' ';
 	sign = 0;
 	if (type & SIGN) {
@@ -108,7 +107,10 @@ static int number(void (*tx_byte)(unsigned char byte, void *data),
 			call_tx('0'), count++;
 		else if (base == 16) {
 			call_tx('0'), count++;
-			call_tx(digits[33]), count++;
+			if (type & LARGE)
+				call_tx('X'), count++;
+			else
+				call_tx('x'), count++;
 		}
 	}
 	if (!(type & LEFT)) {
@@ -138,7 +140,7 @@ int vtxprintf(void (*tx_byte)(unsigned char byte, void *data),
 	int field_width;	/* width of output field */
 	int precision;		/* min. # of digits for integers; max
 				   number of chars for from string */
-	int qualifier;		/* 'h', 'H', 'l', or 'L' for integer fields */
+	int qualifier;		/* 'h', 'H', 'l', 'L', 'z', or 'j' for integer fields */
 
 	int count;
 
@@ -192,7 +194,7 @@ repeat:
 
 		/* get the conversion qualifier */
 		qualifier = -1;
-		if (*fmt == 'h' || *fmt == 'l' || *fmt == 'L' || *fmt == 'z') {
+		if (*fmt == 'h' || *fmt == 'l' || *fmt == 'L' || *fmt == 'z' || *fmt == 'j') {
 			qualifier = *fmt;
 			++fmt;
 			if (*fmt == 'l') {
@@ -293,6 +295,8 @@ repeat:
 			num = va_arg(args, unsigned long);
 		} else if (qualifier == 'z') {
 			num = va_arg(args, size_t);
+		} else if (qualifier == 'j') {
+			num = va_arg(args, uintmax_t);
 		} else if (qualifier == 'h') {
 			num = (unsigned short) va_arg(args, int);
 			if (flags & SIGN)

src/cpu/allwinner/a10/Kconfig

@@ -10,7 +10,7 @@ config CPU_SPECIFIC_OPTIONS
 	select ARCH_VERSTAGE_ARMV7
 	select ARCH_ROMSTAGE_ARMV7
 	select ARCH_RAMSTAGE_ARMV7
-	select HAVE_MONOTONIC_TIMER
+	select NO_MONOTONIC_TIMER
 	select HAVE_UART_SPECIAL
 	select UART_OVERRIDE_REFCLK
 	select BOOT_DEVICE_NOT_SPI_FLASH

src/cpu/allwinner/a10/Makefile.inc

@@ -17,7 +17,6 @@ ramstage-y	+= bootblock_media.c
 ramstage-y	+= cbmem.c
 ramstage-y	+= clock.c
 ramstage-y	+= cpu.c
-ramstage-y	+= monotonic_timer.c
 ramstage-y	+= timer.c
 ramstage-y	+= twi.c
 

src/cpu/amd/agesa/Kconfig

@@ -30,6 +30,7 @@ config CPU_AMD_AGESA
 	select LAPIC_MONOTONIC_TIMER
 	select SPI_FLASH if HAVE_ACPI_RESUME
 	select POSTCAR_STAGE
+	select SMM_ASEG
 
 if CPU_AMD_AGESA
 

src/cpu/amd/agesa/family15tn/Makefile.inc

@@ -19,7 +19,7 @@ ramstage-y += fixme.c
 ramstage-y += chip_name.c
 ramstage-y += model_15_init.c
 
-smm-$(CONFIG_HAVE_SMI_HANDLER) += udelay.c
+smm-y += udelay.c
 
 subdirs-y += ../../mtrr
 subdirs-y += ../../smm

src/cpu/amd/family_10h-family_15h/Kconfig

@@ -7,7 +7,6 @@ config CPU_AMD_MODEL_10XXX
 	select SSE2
 	select TSC_SYNC_LFENCE
 	select UDELAY_LAPIC
-	select HAVE_MONOTONIC_TIMER
 	select SUPPORT_CPU_UCODE_IN_CBFS
 	select CPU_MICROCODE_MULTIPLE_FILES
 	select ACPI_HUGE_LOWMEM_BACKUP

src/cpu/amd/family_10h-family_15h/fidvid.c

@@ -91,6 +91,7 @@ b.-  prep_fid_change(...)
 
 #include <console/console.h>
 #include <cpu/amd/msr.h>
+#include <device/pci_ops.h>
 #include <inttypes.h>
 #include <northbridge/amd/amdht/AsPsDefs.h>
 

src/cpu/amd/pi/00630F01/Makefile.inc

@@ -19,7 +19,7 @@ ramstage-y += fixme.c
 ramstage-y += chip_name.c
 ramstage-y += model_15_init.c
 
-smm-$(CONFIG_HAVE_SMI_HANDLER) += udelay.c
+smm-y += udelay.c
 
 subdirs-y += ../../mtrr
 subdirs-y += ../../smm

src/cpu/amd/pi/Kconfig

@@ -29,6 +29,7 @@ config CPU_AMD_PI
 	select LAPIC_MONOTONIC_TIMER
 	select SPI_FLASH if HAVE_ACPI_RESUME
 	select POSTCAR_STAGE if !BINARYPI_LEGACY_WRAPPER
+	select SMM_ASEG
 
 if CPU_AMD_PI
 

src/cpu/amd/pi/romstage.c

@@ -40,8 +40,7 @@ void *asmlinkage romstage_main(unsigned long bist)
 
 	romstage_handoff_init(s3resume);
 
-	uintptr_t stack_top = romstage_ram_stack_base(HIGH_ROMSTAGE_STACK_SIZE,
-		ROMSTAGE_STACK_CBMEM);
+	char *stack_top = cbmem_add(CBMEM_ID_ROMSTAGE_RAM_STACK, HIGH_ROMSTAGE_STACK_SIZE);
 	stack_top += HIGH_ROMSTAGE_STACK_SIZE;
 
 	printk(BIOS_DEBUG, "Move CAR stack.\n");

src/cpu/amd/smm/smm_init.c

@@ -70,11 +70,6 @@ void smm_init(void)
 	/* CPU MSR are set in CPU init */
 }
 
-void smm_lock(void)
-{
-	/* We lock SMM in CPU init */
-}
-
 void smm_init_completion(void)
 {
 }

src/cpu/intel/common/Makefile.inc

@@ -2,4 +2,4 @@ ramstage-y += common_init.c
 romstage-$(CONFIG_UDELAY_LAPIC) += fsb.c
 ramstage-$(CONFIG_UDELAY_LAPIC) += fsb.c
 postcar-$(CONFIG_UDELAY_LAPIC) += fsb.c
-smm-$(CONFIG_HAVE_SMI_HANDLER) += fsb.c
+smm-y += fsb.c

src/cpu/intel/fsp_model_406dx/Kconfig

@@ -35,6 +35,7 @@ config CPU_SPECIFIC_OPTIONS
 	select TSC_SYNC_MFENCE
 	select LAPIC_MONOTONIC_TIMER
 	select CPU_INTEL_COMMON
+	select NO_SMM
 
 	# Microcode header files are delivered in FSP package
 	select USES_MICROCODE_HEADER_FILES if HAVE_FSP_BIN

src/cpu/intel/haswell/Kconfig

@@ -10,13 +10,12 @@ config CPU_SPECIFIC_OPTIONS
 	select ARCH_VERSTAGE_X86_32
 	select ARCH_ROMSTAGE_X86_32
 	select ARCH_RAMSTAGE_X86_32
-	select HAVE_MONOTONIC_TIMER
 	select SMP
 	select MMX
 	select SSE2
 	select UDELAY_TSC
 	select TSC_CONSTANT_RATE
-	select SMM_TSEG
+	select TSC_MONOTONIC_TIMER
 	select SUPPORT_CPU_UCODE_IN_CBFS
 	#select AP_IN_SIPI_WAIT
 	select TSC_SYNC_MFENCE

src/cpu/intel/haswell/Makefile.inc

@@ -13,16 +13,8 @@ ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smmrelocate.c
 romstage-$(CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM) += stage_cache.c
 postcar-$(CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM) += stage_cache.c
 
-smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c
-smm-$(CONFIG_HAVE_SMI_HANDLER) += tsc_freq.c
-
-ifneq ($(CONFIG_TSC_MONOTONIC_TIMER),y)
-bootblock-y += monotonic_timer.c
-romstage-y += monotonic_timer.c
-postcar-y += monotonic_timer.c
-ramstage-y += monotonic_timer.c
-smm-y += monotonic_timer.c
-endif
+smm-y += finalize.c
+smm-y += tsc_freq.c
 
 bootblock-y += ../car/non-evict/cache_as_ram.S
 bootblock-y += ../car/bootblock.c

src/cpu/intel/haswell/haswell.h

@@ -166,6 +166,7 @@ void smm_info(uintptr_t *perm_smbase, size_t *perm_smsize,
 		size_t *smm_save_state_size);
 void smm_initialize(void);
 void smm_relocate(void);
+void smm_lock(void);
 struct bus;
 void bsp_init_and_start_aps(struct bus *cpu_bus);
 /* Determine if HyperThreading is disabled. The variable is not valid until

src/cpu/intel/haswell/monotonic_timer.c

@@ -1,58 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2013 Google, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-#include <stdint.h>
-#include <cpu/x86/msr.h>
-#include <timer.h>
-
-#define MSR_COUNTER_24_MHz 0x637
-static struct monotonic_counter {
-	int initialized;
-	struct mono_time time;
-	uint32_t last_value;
-} mono_counter;
-
-static inline uint32_t read_counter_msr(void)
-{
-	/* Even though the MSR is 64-bit it is assumed that the hardware
-	 * is polled frequently enough to only use the lower 32-bits. */
-	msr_t counter_msr;
-
-	counter_msr = rdmsr(MSR_COUNTER_24_MHz);
-
-	return counter_msr.lo;
-}
-
-void timer_monotonic_get(struct mono_time *mt)
-{
-	uint32_t current_tick;
-	uint32_t usecs_elapsed;
-
-	if (!mono_counter.initialized) {
-		mono_counter.last_value = read_counter_msr();
-		mono_counter.initialized = 1;
-	}
-
-	current_tick = read_counter_msr();
-	usecs_elapsed = (current_tick - mono_counter.last_value) / 24;
-
-	/* Update current time and tick values only if a full tick occurred. */
-	if (usecs_elapsed) {
-		mono_time_add_usecs(&mono_counter.time, usecs_elapsed);
-		mono_counter.last_value = current_tick;
-	}
-
-	/* Save result. */
-	*mt = mono_counter.time;
-}

src/cpu/intel/haswell/romstage.c

@@ -38,8 +38,6 @@
 #include <cpu/intel/romstage.h>
 #include "haswell.h"
 
-#define ROMSTAGE_RAM_STACK_SIZE 0x5000
-
 /* platform_enter_postcar() determines the stack to use after
  * cache-as-ram is torn down as well as the MTRR settings to use,
  * and continues execution in postcar stage. */
@@ -48,7 +46,7 @@ void platform_enter_postcar(void)
 	struct postcar_frame pcf;
 	uintptr_t top_of_ram;
 
-	if (postcar_frame_init(&pcf, ROMSTAGE_RAM_STACK_SIZE))
+	if (postcar_frame_init(&pcf, 0))
 		die("Unable to initialize postcar frame.\n");
 	/* Cache the ROM as WP just below 4GiB. */
 	postcar_frame_add_romcache(&pcf, MTRR_TYPE_WRPROT);

src/cpu/intel/model_1067x/Makefile.inc

@@ -2,6 +2,6 @@ ramstage-y += model_1067x_init.c
 ramstage-$(CONFIG_PARALLEL_MP) += mp_init.c
 subdirs-y += ../../x86/name
 subdirs-y += ../common
-subdirs-$(CONFIG_SMM_TSEG) += ../smm/gen1
+subdirs-y += ../smm/gen1
 
 cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-17-*)

src/cpu/intel/model_106cx/Makefile.inc

@@ -1,7 +1,7 @@
 ramstage-y += model_106cx_init.c
 subdirs-y += ../../x86/name
 subdirs-y += ../common
-subdirs-$(CONFIG_SMM_TSEG) += ../smm/gen1
+subdirs-y += ../smm/gen1
 ramstage-$(CONFIG_PARALLEL_MP) += ../model_1067x/mp_init.c
 
 cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-1c-*)

src/cpu/intel/model_2065x/Kconfig

@@ -13,7 +13,7 @@ config CPU_SPECIFIC_OPTIONS
 	select SSE2
 	select UDELAY_TSC
 	select TSC_CONSTANT_RATE
-	select SMM_TSEG
+	select TSC_MONOTONIC_TIMER
 	select SUPPORT_CPU_UCODE_IN_CBFS
 	select PARALLEL_CPU_INIT
 	#select AP_IN_SIPI_WAIT

src/cpu/intel/model_2065x/Makefile.inc

@@ -13,11 +13,11 @@ subdirs-y += ../common
 ramstage-y += tsc_freq.c
 romstage-y += tsc_freq.c
 postcar-y += tsc_freq.c
-smm-$(CONFIG_HAVE_SMI_HANDLER) += tsc_freq.c
+smm-y += tsc_freq.c
 
 ramstage-y += acpi.c
 
-smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c
+smm-y += finalize.c
 
 romstage-y += stage_cache.c
 ramstage-y += stage_cache.c

src/cpu/intel/model_206ax/Kconfig

@@ -15,7 +15,6 @@ config CPU_SPECIFIC_OPTIONS
 	select UDELAY_TSC
 	select TSC_CONSTANT_RATE
 	select TSC_MONOTONIC_TIMER
-	select SMM_TSEG
 	select SUPPORT_CPU_UCODE_IN_CBFS
 	#select AP_IN_SIPI_WAIT
 	select TSC_SYNC_MFENCE

src/cpu/intel/model_206ax/Makefile.inc

@@ -15,14 +15,14 @@ ramstage-y += acpi.c
 
 ramstage-y += common.c
 romstage-y += common.c
-smm-$(CONFIG_HAVE_SMI_HANDLER) += common.c
+smm-y += common.c
 
 ramstage-y += tsc_freq.c
 romstage-y += tsc_freq.c
 postcar-y += tsc_freq.c
-smm-$(CONFIG_HAVE_SMI_HANDLER) += tsc_freq.c
+smm-y += tsc_freq.c
 
-smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c
+smm-y += finalize.c
 
 romstage-$(CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM) += stage_cache.c
 postcar-$(CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM) += stage_cache.c

src/cpu/intel/model_6ex/Makefile.inc

@@ -1,7 +1,7 @@
 ramstage-y += model_6ex_init.c
 subdirs-y += ../../x86/name
 subdirs-y += ../common
-subdirs-$(CONFIG_SMM_TSEG) += ../smm/gen1
+subdirs-y += ../smm/gen1
 ramstage-y += ../model_1067x/mp_init.c
 
 cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-0e-*)

src/cpu/intel/model_6fx/Makefile.inc

@@ -2,6 +2,6 @@ ramstage-y += model_6fx_init.c
 subdirs-y += ../../x86/name
 subdirs-y += ../common
 ramstage-$(CONFIG_PARALLEL_MP) += ../model_1067x/mp_init.c
-subdirs-$(CONFIG_SMM_TSEG) += ../smm/gen1
+subdirs-y += ../smm/gen1
 
 cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-0f-*)

src/cpu/intel/model_f2x/Kconfig

@@ -6,3 +6,4 @@ config CPU_INTEL_MODEL_F2X
 	select ARCH_RAMSTAGE_X86_32
 	select SMP
 	select SUPPORT_CPU_UCODE_IN_CBFS
+	select SMM_ASEG

src/cpu/intel/model_f3x/Makefile.inc

@@ -1,5 +1,5 @@
 ramstage-y += model_f3x_init.c
-subdirs-$(CONFIG_SMM_TSEG) += ../smm/gen1
+subdirs-y += ../smm/gen1
 ramstage-$(CONFIG_PARALLEL_MP) += ../model_1067x/mp_init.c
 
 cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/0f-03-*)

src/cpu/intel/model_f4x/Makefile.inc

@@ -1,5 +1,5 @@
 ramstage-y += model_f4x_init.c
-subdirs-$(CONFIG_SMM_TSEG) += ../smm/gen1
+subdirs-y += ../smm/gen1
 ramstage-$(CONFIG_PARALLEL_MP) += ../model_1067x/mp_init.c
 
 cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/0f-04-*)

src/cpu/intel/slot_1/Kconfig

@@ -25,6 +25,8 @@ config SLOT_SPECIFIC_OPTIONS # dummy
 	select CPU_INTEL_MODEL_68X
 	select CPU_INTEL_MODEL_6BX
 	select CPU_INTEL_MODEL_6XX
+	select NO_SMM
+	select NO_MONOTONIC_TIMER
 
 config DCACHE_RAM_BASE
 	hex

src/cpu/intel/smm/gen1/smi.h

@@ -31,3 +31,4 @@ void southbridge_smm_clear_state(void);
 void smm_relocation_handler(int cpu, uintptr_t curr_smbase,
 			uintptr_t staggered_smbase);
 void smm_relocate(void);
+void smm_lock(void);

src/cpu/intel/smm/gen1/smmrelocate.c

@@ -57,7 +57,6 @@ struct smm_relocation_params {
 
 /* This gets filled in and used during relocation. */
 static struct smm_relocation_params smm_reloc_params;
-static void *default_smm_area = NULL;
 
 /* On model_6fx, model_1067x and model_106cx SMRR functions slightly
    differently. The MSR are at different location from the rest
@@ -168,11 +167,6 @@ static void setup_ied_area(struct smm_relocation_params *params)
 	memset(ied_base + (1 << 20), 0, (32 << 10));
 }
 
-void smm_init_completion(void)
-{
-	restore_default_smm_area(default_smm_area);
-}
-
 void smm_lock(void)
 {
 	/* LOCK the SMM memory window and enable normal SMM.

src/cpu/intel/socket_mPGA604/Kconfig

@@ -9,6 +9,7 @@ config SOCKET_SPECIFIC_OPTIONS # dummy
 	select MMX
 	select SSE
 	select UDELAY_TSC
+	select TSC_MONOTONIC_TIMER
 	select SIPI_VECTOR_IN_ROM
 	select C_ENVIRONMENT_BOOTBLOCK
 

src/cpu/qemu-power8/Kconfig

@@ -19,3 +19,4 @@ config CPU_QEMU_POWER8
 	select ARCH_VERSTAGE_PPC64
 	select ARCH_ROMSTAGE_PPC64
 	select ARCH_RAMSTAGE_PPC64
+	select NO_MONOTONIC_TIMER

src/cpu/qemu-x86/Kconfig

@@ -21,4 +21,6 @@ config CPU_QEMU_X86
 	select ARCH_RAMSTAGE_X86_32
 	select SMP
 	select UDELAY_TSC
+	select NO_MONOTONIC_TIMER
 	select C_ENVIRONMENT_BOOTBLOCK
+	select SMM_ASEG

src/cpu/ti/am335x/Kconfig

@@ -3,9 +3,7 @@ config CPU_TI_AM335X
 	select ARCH_VERSTAGE_ARMV7
 	select ARCH_ROMSTAGE_ARMV7
 	select ARCH_RAMSTAGE_ARMV7
-	select HAVE_MONOTONIC_TIMER
 	select HAVE_UART_SPECIAL
-	select GENERIC_UDELAY
 	select UART_OVERRIDE_REFCLK
 	select BOOT_DEVICE_NOT_SPI_FLASH
 	bool

src/cpu/via/nano/Kconfig

@@ -26,6 +26,7 @@ config CPU_SPECIFIC_OPTIONS
 	select ARCH_ROMSTAGE_X86_32
 	select ARCH_RAMSTAGE_X86_32
 	select UDELAY_TSC
+	select NO_MONOTONIC_TIMER
 	select MMX
 	select SSE2
 	select SUPPORT_CPU_UCODE_IN_CBFS

src/cpu/x86/Kconfig

@@ -17,11 +17,6 @@ config PARALLEL_MP_AP_WORK
 	 Allow APs to do other work after initialization instead of going
 	 to sleep.
 
-config UDELAY_IO
-	bool
-	default y if !UDELAY_LAPIC && !UDELAY_TSC && !UDELAY_TIMER2 && !GENERIC_UDELAY
-	default n
-
 config UDELAY_LAPIC
 	bool
 	default n
@@ -29,7 +24,6 @@ config UDELAY_LAPIC
 config LAPIC_MONOTONIC_TIMER
 	def_bool n
 	depends on UDELAY_LAPIC
-	select HAVE_MONOTONIC_TIMER
 	help
 	  Expose monotonic time using the local APIC.
 
@@ -50,15 +44,9 @@ config TSC_CONSTANT_RATE
 config TSC_MONOTONIC_TIMER
 	def_bool n
 	depends on UDELAY_TSC
-	select HAVE_MONOTONIC_TIMER
 	help
 	  Expose monotonic time using the TSC.
 
-# This option is used in code but never selected.
-config UDELAY_TIMER2
-	bool
-	default n
-
 config TSC_SYNC_LFENCE
 	bool
 	default n
@@ -98,14 +86,30 @@ config LOGICAL_CPUS
 	bool
 	default y
 
-config SMM_TSEG
+config HAVE_SMI_HANDLER
 	bool
 	default n
+	depends on (SMM_ASEG || SMM_TSEG)
+
+config NO_SMM
+	bool
+	default n
+
+config SMM_ASEG
+	bool
+	default n
+	depends on !NO_SMM
+
+config SMM_TSEG
+	bool
+	default y
+	depends on !(NO_SMM || SMM_ASEG)
+
+if SMM_TSEG
 
 config SMM_MODULE_HEAP_SIZE
 	hex
 	default 0x4000
-	depends on SMM_TSEG
 	help
 	  This option determines the size of the heap within the SMM handler
 	  modules.
@@ -113,7 +117,6 @@ config SMM_MODULE_HEAP_SIZE
 config SMM_MODULE_STACK_SIZE
 	hex
 	default 0x400
-	depends on SMM_TSEG
 	help
 	  This option determines the size of the stack within the SMM handler
 	  modules.
@@ -121,11 +124,12 @@ config SMM_MODULE_STACK_SIZE
 config SMM_STUB_STACK_SIZE
 	hex
 	default 0x400
-	depends on SMM_TSEG
 	help
 	  This option determines the size of the stack within the SMM handler
 	  modules.
 
+endif
+
 config SMM_LAPIC_REMAP_MITIGATION
 	bool
 	default y if NORTHBRIDGE_INTEL_I945

src/cpu/x86/Kconfig.debug

@@ -14,4 +14,4 @@ config DISPLAY_MTRRS
 
 config DEBUG_SMM_RELOCATION
 	bool "Debug SMM relocation code"
-	depends on HAVE_SMI_HANDLER
+	depends on HAVE_SMI_HANDLER && SMM_ASEG

src/cpu/x86/lapic/lapic_cpu_init.c

@@ -417,7 +417,7 @@ asmlinkage void secondary_cpu_init(unsigned int index)
 	 * Seems that CR4 was cleared when AP start via lapic_start_cpu()
 	 * Turn on CR4.OSFXSR and CR4.OSXMMEXCPT when SSE options enabled
 	 */
-	u32 cr4_val;
+	CRx_TYPE cr4_val;
 	cr4_val = read_cr4();
 	cr4_val |= (CR4_OSFXSR | CR4_OSXMMEXCPT);
 	write_cr4(cr4_val);

src/cpu/x86/pae/pgtbl.c

@@ -2,6 +2,8 @@
  * This file is part of the coreboot project.
  *
  * Copyright (C) 2005 Yinghai Lu
+ * Copyright (C) 2019 9elements Agency GmbH
+ * Copyright (C) 2019 Facebook Inc.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -22,6 +24,7 @@
 #include <cpu/x86/pae.h>
 #include <string.h>
 #include <symbols.h>
+#include <assert.h>
 
 #define PDPTE_PRES (1ULL << 0)
 #define PDPTE_ADDR_MASK (~((1ULL << 12) - 1))
@@ -59,9 +62,20 @@
 #define PTE_IDX_SHIFT 12
 #define PTE_IDX_MASK  0x1ff
 
+#define OVERLAP(a, b, s, e) ((b) > (s) && (a) < (e))
+
 static const size_t s2MiB = 2 * MiB;
 static const size_t s4KiB = 4 * KiB;
 
+struct pde {
+	uint32_t addr_lo;
+	uint32_t addr_hi;
+} __packed;
+struct pg_table {
+	struct pde pd[2048];
+	struct pde pdp[512];
+} __packed;
+
 void paging_enable_pae_cr3(uintptr_t cr3)
 {
 	/* Load the page table address */
@@ -101,6 +115,119 @@ void paging_disable_pae(void)
 	write_cr4(cr4);
 }
 
+/*
+ * Use PAE to map a page and then memset it with the pattern specified.
+ * In order to use PAE pagetables for virtual addressing are set up and reloaded
+ * on a 2MiB boundary. After the function is done, virtual addressing mode is
+ * disabled again. The PAT are set to all cachable, but MTRRs still apply.
+ *
+ * Requires a scratch memory for pagetables and a virtual address for
+ * non identity mapped memory.
+ *
+ * The scratch memory area containing pagetables must not overlap with the
+ * memory range to be cleared.
+ * The scratch memory area containing pagetables must not overlap with the
+ * virtual address for non identity mapped memory.
+ *
+ * @param vmem_addr Where the virtual non identity mapped page resides, must
+ *                  be 2 aligned MiB and at least 2 MiB in size.
+ *                  Content at physical address is preserved.
+ * @param pgtbl     Where pagetables reside, must be 4 KiB aligned and 20 KiB in
+ *                  size.
+ *                  Must not overlap memory range pointed to by dest.
+ *                  Must not overlap memory range pointed to by vmem_addr.
+ *                  Content at physical address isn't preserved.
+ * @param length    The length of the memory segment to memset
+ * @param dest      Physical memory address to memset
+ * @param pat       The pattern to write to the pyhsical memory
+ * @return 0 on success, 1 on error
+ */
+int memset_pae(uint64_t dest, unsigned char pat, uint64_t length, void *pgtbl,
+	       void *vmem_addr)
+{
+	struct pg_table *pgtbl_buf = (struct pg_table *)pgtbl;
+	ssize_t offset;
+
+	printk(BIOS_DEBUG, "%s: Using virtual address %p as scratchpad\n",
+	       __func__, vmem_addr);
+	printk(BIOS_DEBUG, "%s: Using address %p for page tables\n",
+	       __func__, pgtbl_buf);
+
+	/* Cover some basic error conditions */
+	if (!IS_ALIGNED((uintptr_t)pgtbl_buf, s4KiB) ||
+	    !IS_ALIGNED((uintptr_t)vmem_addr, s2MiB)) {
+		printk(BIOS_ERR, "%s: Invalid alignment\n", __func__);
+		return 1;
+	}
+	const uintptr_t pgtbl_s = (uintptr_t)pgtbl_buf;
+	const uintptr_t pgtbl_e = pgtbl_s + sizeof(struct pg_table);
+
+	if (OVERLAP(dest, dest + length, pgtbl_s, pgtbl_e)) {
+		printk(BIOS_ERR, "%s: destination overlaps page tables\n",
+		       __func__);
+		return 1;
+	}
+
+	if (OVERLAP((uintptr_t)vmem_addr, (uintptr_t)vmem_addr + s2MiB,
+		    pgtbl_s, pgtbl_e)) {
+		printk(BIOS_ERR, "%s: vmem address overlaps page tables\n",
+		       __func__);
+		return 1;
+	}
+
+	paging_disable_pae();
+
+	struct pde *pd = pgtbl_buf->pd, *pdp = pgtbl_buf->pdp;
+	/* Point the page directory pointers at the page directories. */
+	memset(pgtbl_buf->pdp, 0, sizeof(pgtbl_buf->pdp));
+
+	pdp[0].addr_lo = ((uintptr_t)&pd[512*0]) | PDPTE_PRES;
+	pdp[1].addr_lo = ((uintptr_t)&pd[512*1]) | PDPTE_PRES;
+	pdp[2].addr_lo = ((uintptr_t)&pd[512*2]) | PDPTE_PRES;
+	pdp[3].addr_lo = ((uintptr_t)&pd[512*3]) | PDPTE_PRES;
+
+	offset = dest - ALIGN_DOWN(dest, s2MiB);
+	dest = ALIGN_DOWN(dest, s2MiB);
+
+	/* Identity map the whole 32-bit address space */
+	for (size_t i = 0; i < 2048; i++) {
+		pd[i].addr_lo = (i << PDE_IDX_SHIFT) | PDE_PS | PDE_PRES | PDE_RW;
+		pd[i].addr_hi = 0;
+	}
+
+	/* Get pointer to PD that's not identity mapped */
+	pd = &pgtbl_buf->pd[((uintptr_t)vmem_addr) >> PDE_IDX_SHIFT];
+
+	paging_enable_pae_cr3((uintptr_t)pdp);
+
+	do {
+		const size_t len = MIN(length, s2MiB - offset);
+
+		/*
+		 * Map a page using PAE at virtual address vmem_addr.
+		 * dest is already 2 MiB aligned.
+		 */
+		pd->addr_lo = dest | PDE_PS | PDE_PRES | PDE_RW;
+		pd->addr_hi = dest >> 32;
+
+		/* Update page tables */
+		asm volatile ("invlpg (%0)" :: "b"(vmem_addr) : "memory");
+
+		printk(BIOS_SPEW, "%s: Clearing %llx[%lx] - %zx\n", __func__,
+		       dest + offset, (uintptr_t)vmem_addr + offset, len);
+
+		memset(vmem_addr + offset, pat, len);
+
+		dest += s2MiB;
+		length -= len;
+		offset = 0;
+	} while (length > 0);
+
+	paging_disable_pae();
+
+	return 0;
+}
+
 #if ENV_RAMSTAGE
 void *map_2M_page(unsigned long page)
 {

src/cpu/x86/smm/Makefile.inc

@@ -36,13 +36,16 @@ $(call src-to-obj,ramstage,$(obj)/cpu/x86/smm/smm.manual): $(obj)/smm/smm
 	@printf "    OBJCOPY    $(subst $(obj)/,,$(@))\n"
 	cd $(dir $<); $(OBJCOPY_smm) -I binary $(notdir $<) $(target-objcopy) $(abspath $@)
 
+ifeq ($(CONFIG_HAVE_SMI_HANDLER),y)
+ramstage-srcs += $(obj)/cpu/x86/smm/smm.manual
+endif
+
 ifeq ($(CONFIG_SMM_TSEG),y)
 
 smmstub-y += smm_stub.S
 
 smm-y += smm_module_handler.c
 
-ramstage-srcs += $(obj)/cpu/x86/smm/smm.manual
 ramstage-srcs += $(obj)/cpu/x86/smm/smmstub.manual
 
 # SMM Stub Module. The stub is used as a trampoline for relocation and normal
@@ -82,10 +85,6 @@ $(obj)/smm/smm: $(obj)/smm/smm.o $(src)/cpu/x86/smm/smm.ld
 	$(NM_smm) -n $(obj)/smm/smm.elf | sort > $(obj)/smm/smm.map
 	$(OBJCOPY_smm) -O binary $(obj)/smm/smm.elf $@
 
-ifeq ($(CONFIG_HAVE_SMI_HANDLER),y)
-ramstage-srcs += $(obj)/cpu/x86/smm/smm.manual
-endif
-
 smm-y += smmhandler.S
 smm-y += smihandler.c
 

src/cpu/x86/smm/smihandler.c

@@ -47,7 +47,7 @@ static int smi_obtain_lock(void)
 	return (ret == SMI_UNLOCKED);
 }
 
-void smi_release_lock(void)
+static void smi_release_lock(void)
 {
 	asm volatile (
 		"movb %1, %%al\n"

src/cpu/x86/smm/smm_module_loader.c

@@ -185,7 +185,7 @@ static int smm_module_setup_stub(void *smbase, struct smm_loader_params *params,
 	void *stacks_top;
 	size_t size;
 	char *base;
-	int i;
+	size_t i;
 	struct smm_stub_params *stub_params;
 	struct rmodule smm_stub;
 

src/cpu/x86/smm/smmrelocate.S

@@ -32,10 +32,9 @@
 // ADDR32() macro
 #include <arch/registers.h>
 
-#if CONFIG(SMM_TSEG)
-#error "Don't use this file with TSEG."
-
-#endif /* CONFIG_SMM_TSEG */
+#if !CONFIG(SMM_ASEG)
+#error "Only use this file with ASEG."
+#endif /* CONFIG_SMM_ASEG */
 
 #define LAPIC_ID 0xfee00020
 

src/cpu/x86/tsc/Makefile.inc

@@ -3,6 +3,4 @@ ramstage-$(CONFIG_UDELAY_TSC) += delay_tsc.c
 romstage-$(CONFIG_TSC_CONSTANT_RATE) += delay_tsc.c
 verstage-$(CONFIG_TSC_CONSTANT_RATE) += delay_tsc.c
 postcar-$(CONFIG_TSC_CONSTANT_RATE) += delay_tsc.c
-ifeq ($(CONFIG_HAVE_SMI_HANDLER),y)
 smm-$(CONFIG_TSC_CONSTANT_RATE) += delay_tsc.c
-endif

src/device/device_const.c

@@ -183,10 +183,42 @@ DEVTREE_CONST struct device *pcidev_path_behind(
 	return find_dev_path(parent, &path);
 }
 
-DEVTREE_CONST struct device *pcidev_path_on_root(pci_devfn_t devfn)
+DEVTREE_CONST struct device *pcidev_path_on_bus(unsigned int bus, pci_devfn_t devfn)
+{
+	DEVTREE_CONST struct bus *parent = pci_root_bus();
+	DEVTREE_CONST struct device *dev = parent->children;
+
+	/* FIXME: Write the loop with topology links. */
+	while (dev) {
+		if (dev->path.type != DEVICE_PATH_PCI) {
+			dev = dev->next;
+			continue;
+		}
+		if (dev->bus->secondary == bus)
+			return pcidev_path_behind(dev->bus, devfn);
+		dev = dev->next;
+	}
+	return NULL;
+}
+
+DEVTREE_CONST struct bus *pci_root_bus(void)
 {
 	DEVTREE_CONST struct device *pci_domain;
+	MAYBE_STATIC DEVTREE_CONST struct bus *pci_root = NULL;
 
+	if (pci_root)
+		return pci_root;
+
+	pci_domain = dev_find_path(NULL, DEVICE_PATH_DOMAIN);
+	if (!pci_domain)
+		return NULL;
+
+	pci_root = pci_domain->link_list;
+	return pci_root;
+}
+
+DEVTREE_CONST struct device *pcidev_path_on_root(pci_devfn_t devfn)
+{
 	/* Work around pcidev_path_behind() below failing
 	 * due tue complicated devicetree with topology
 	 * being manipulated on-the-fly.
@@ -194,11 +226,7 @@ DEVTREE_CONST struct device *pcidev_path_on_root(pci_devfn_t devfn)
 	if (CONFIG(NORTHBRIDGE_AMD_AMDFAM10))
 		return dev_find_slot(0, devfn);
 
-	pci_domain = dev_find_path(NULL, DEVICE_PATH_DOMAIN);
-	if (!pci_domain)
-		return NULL;
-
-	return pcidev_path_behind(pci_domain->link_list, devfn);
+	return pcidev_path_behind(pci_root_bus(), devfn);
 }
 
 DEVTREE_CONST struct device *pcidev_on_root(uint8_t dev, uint8_t fn)

src/device/device_util.c

@@ -145,7 +145,7 @@ u32 dev_path_encode(const struct device *dev)
 		ret |= dev->path.spi.cs;
 		break;
 	case DEVICE_PATH_USB:
-		ret |= dev->path.usb.port_type << 8 || dev->path.usb.port_id;
+		ret |= dev->path.usb.port_type << 8 | dev->path.usb.port_id;
 		break;
 	case DEVICE_PATH_NONE:
 	case DEVICE_PATH_MMIO:  /* don't care */

src/device/hypertransport.c

@@ -291,7 +291,6 @@ static unsigned int do_hypertransport_scan_chain(struct bus *bus, unsigned min_d
 	prev.freq_cap_off = PCI_HT_CAP_HOST_FREQ_CAP;
 
 	/* If present, assign unitid to a hypertransport chain. */
-	last_unitid = min_unitid -1;
 	max_unitid = next_unitid = min_unitid;
 	do {
 		u8 pos;