Remove old clock gate patch
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@@ -156,9 +156,6 @@ chip soc/intel/cannonlake
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# Address 0x90: Disabled
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register "gen4_dec" = "0x00000000"
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# 8254
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register "clock_gate_8254" = "0"
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# PMC (soc/intel/cannonlake/pmc.c)
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# Enable deep Sx states
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register "deep_s3_enable_ac" = "0"
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@@ -241,10 +241,6 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
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/* S0ix */
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params->PchPmSlpS0Enable = config->s0ix_enable;
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/* Legacy 8254 timer support */
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params->Enable8254ClockGating = config->clock_gate_8254;
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params->Enable8254ClockGatingOnS3 = config->clock_gate_8254;
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/* disable Legacy PME */
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memset(params->PcieRpPmSci, 0, sizeof(params->PcieRpPmSci));
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