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util/mb/google: add templates for dedede boards

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Add template directories for the Waddledee and Waddledoo reference
boards of the Dedede baseboard.

BUG=b:157183582
BRANCH=None
TEST=N/A

Signed-off-by: Paul Fagerburg <pfagerburg@chromium.org>
Change-Id: Ida70a44097334991a93fec8f4933d7f6e39a187b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41640
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
This commit is contained in:
Paul Fagerburg 2020-05-21 17:13:48 -06:00 committed by Karthik Ramasubramanian
parent 29c6169efd
commit af983db3f4
9 changed files with 141 additions and 0 deletions
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3
util/mainboard/google/waddledee/template/Makefile.inc Normal file
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@ -0,0 +1,3 @@
## SPDX-License-Identifier: GPL-2.0-or-later
SPD_SOURCES += empty #0b0000

8
util/mainboard/google/waddledee/template/include/variant/ec.h Normal file
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/* SPDX-License-Identifier: GPL-2.0-or-later */
#ifndef MAINBOARD_EC_H
#define MAINBOARD_EC_H
#include <baseboard/ec.h>
#endif

8
util/mainboard/google/waddledee/template/include/variant/gpio.h Normal file
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/* SPDX-License-Identifier: GPL-2.0-or-later */
#ifndef MAINBOARD_GPIO_H
#define MAINBOARD_GPIO_H
#include <baseboard/gpio.h>
#endif /* MAINBOARD_GPIO_H */

42
util/mainboard/google/waddledee/template/overridetree.cb Normal file
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chip soc/intel/jasperlake
# Intel Common SoC Config
#+-------------------+---------------------------+
#| Field | Value |
#+-------------------+---------------------------+
#| GSPI0 | cr50 TPM. Early init is |
#| | required to set up a BAR |
#| | for TPM communication |
#| | before memory is up |
#| I2C0 | Trackpad |
#| I2C1 | Digitizer |
#| I2C2 | Touchscreen |
#| I2C3 | Camera |
#| I2C4 | Audio |
#+-------------------+---------------------------+
register "common_soc_config" = "{
.gspi[0] = {
.speed_mhz = 1,
.early_init = 1,
},
.i2c[0] = {
.speed = I2C_SPEED_FAST,
},
.i2c[1] = {
.speed = I2C_SPEED_FAST,
},
.i2c[2] = {
.speed = I2C_SPEED_FAST,
},
.i2c[3] = {
.speed = I2C_SPEED_FAST,
},
.i2c[4] = {
.speed = I2C_SPEED_FAST,
},
}"
device domain 0 on
device pci 15.0 on end
end
end

3
util/mainboard/google/waddledoo/template/Makefile.inc Normal file
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## SPDX-License-Identifier: GPL-2.0-or-later
SPD_SOURCES = empty #0b0000

3
util/mainboard/google/waddledoo/template/include/variant/acpi/camera.asl Normal file
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/* SPDX-License-Identifier: GPL-2.0-only */
#include <baseboard/acpi/camera.asl>

8
util/mainboard/google/waddledoo/template/include/variant/ec.h Normal file
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@ -0,0 +1,8 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#ifndef MAINBOARD_EC_H
#define MAINBOARD_EC_H
#include <baseboard/ec.h>
#endif

8
util/mainboard/google/waddledoo/template/include/variant/gpio.h Normal file
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@ -0,0 +1,8 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#ifndef MAINBOARD_GPIO_H
#define MAINBOARD_GPIO_H
#include <baseboard/gpio.h>
#endif /* MAINBOARD_GPIO_H */

58
util/mainboard/google/waddledoo/template/overridetree.cb Normal file
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chip soc/intel/jasperlake
# USB Port Configuration
register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # Camera
# Intel Common SoC Config
#+-------------------+---------------------------+
#| Field | Value |
#+-------------------+---------------------------+
#| GSPI0 | cr50 TPM. Early init is |
#| | required to set up a BAR |
#| | for TPM communication |
#| | before memory is up |
#| I2C0 | Trackpad |
#| I2C1 | Digitizer |
#| I2C2 | Touchscreen |
#| I2C3 | Camera |
#| I2C4 | Audio |
#+-------------------+---------------------------+
register "common_soc_config" = "{
.gspi[0] = {
.speed_mhz = 1,
.early_init = 1,
},
.i2c[0] = {
.speed = I2C_SPEED_FAST,
.rise_time_ns = 66,
.fall_time_ns = 90,
.data_hold_time_ns = 350,
},
.i2c[1] = {
.speed = I2C_SPEED_FAST,
},
.i2c[2] = {
.speed = I2C_SPEED_FAST,
},
.i2c[3] = {
.speed = I2C_SPEED_FAST,
},
.i2c[4] = {
.speed = I2C_SPEED_FAST,
.speed_config[0] = {
.speed = I2C_SPEED_FAST,
.scl_lcnt = 176,
.scl_hcnt = 95,
.sda_hold = 36,
}
},
}"
device domain 0 on
device pci 14.0 on end
device pci 15.0 on end
device pci 15.2 on end
device pci 1c.7 on end
device pci 19.0 on end
device pci 1f.3 on end
end
end