TPM support
Change-Id: I1d106ac7da4d7229706cb8ad5a98c58b32d86a40
This commit is contained in:
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d48dd84ae8
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@ -12,9 +12,8 @@ config BOARD_SPECIFIC_OPTIONS
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select HAVE_SMI_HANDLER
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select HAVE_SMI_HANDLER
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select INTEL_GMA_HAVE_VBT
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select INTEL_GMA_HAVE_VBT
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select INTEL_LPSS_UART_FOR_CONSOLE
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select INTEL_LPSS_UART_FOR_CONSOLE
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# Chip select 2 is not yet supported by intel fast_spi
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select MAINBOARD_HAS_LPC_TPM
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# select MAINBOARD_HAS_SPI_TPM_CR50
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select MAINBOARD_HAS_TPM2
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# select MAINBOARD_HAS_TPM2
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select NO_UART_ON_SUPERIO
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select NO_UART_ON_SUPERIO
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select PCIEXP_HOTPLUG
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select PCIEXP_HOTPLUG
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select SOC_INTEL_COMETLAKE
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select SOC_INTEL_COMETLAKE
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@ -98,13 +97,8 @@ config POST_DEVICE
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bool
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bool
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default n
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default n
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# Chip select 2 is not yet supported by intel fast_spi
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config TPM_PIRQ
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#config DRIVER_TPM_SPI_BUS
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hex
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# hex
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default 0x1F # GPP_A7_IRQ
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# default 0x0
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#
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#config DRIVER_TPM_SPI_CHIP
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# int
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# default 2
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endif
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endif
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@ -230,7 +230,11 @@ chip soc/intel/cannonlake
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device pci 1e.1 off end # UART #1
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device pci 1e.1 off end # UART #1
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device pci 1e.2 off end # GSPI #0
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device pci 1e.2 off end # GSPI #0
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device pci 1e.3 off end # GSPI #1
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device pci 1e.3 off end # GSPI #1
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device pci 1f.0 on end # LPC Interface
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device pci 1f.0 on # LPC Interface
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chip drivers/pc80/tpm
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device pnp 0c31.0 on end
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end
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end
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device pci 1f.1 off end # P2SB
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device pci 1f.1 off end # P2SB
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device pci 1f.2 off end # Power Management Controller
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device pci 1f.2 off end # Power Management Controller
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device pci 1f.3 on end # Intel HDA
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device pci 1f.3 on end # Intel HDA
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@ -89,8 +89,8 @@ static const struct pad_config gpio_table[] = {
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PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1),
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// GSPI0
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// GSPI0
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// TODO - TPM_PIRQ#
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// TPM_PIRQ#
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PAD_CFG_NC(GPP_A7),
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PAD_CFG_GPI_APIC_HIGH(GPP_A7, NONE, DEEP),
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// LPC
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// LPC
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// PM_CLKRUN# with pull-up
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// PM_CLKRUN# with pull-up
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@ -11,9 +11,8 @@ config BOARD_SPECIFIC_OPTIONS
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select GENERIC_SPD_BIN
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select GENERIC_SPD_BIN
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select INTEL_GMA_HAVE_VBT
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select INTEL_GMA_HAVE_VBT
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select INTEL_LPSS_UART_FOR_CONSOLE
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select INTEL_LPSS_UART_FOR_CONSOLE
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# Chip select 2 is not yet supported by intel fast_spi
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select MAINBOARD_HAS_LPC_TPM
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# select MAINBOARD_HAS_SPI_TPM_CR50
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select MAINBOARD_HAS_TPM2
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# select MAINBOARD_HAS_TPM2
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select NO_UART_ON_SUPERIO
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select NO_UART_ON_SUPERIO
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select SOC_INTEL_COMETLAKE
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select SOC_INTEL_COMETLAKE
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select SOC_INTEL_COMMON_BLOCK_HDA
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select SOC_INTEL_COMMON_BLOCK_HDA
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@ -91,13 +90,8 @@ config POST_DEVICE
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bool
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bool
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default n
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default n
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# Chip select 2 is not yet supported by intel fast_spi
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config TPM_PIRQ
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#config DRIVER_TPM_SPI_BUS
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hex
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# hex
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default 0x1F # GPP_A7_IRQ
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# default 0x0
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#
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#config DRIVER_TPM_SPI_CHIP
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# int
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# default 2
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endif
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endif
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@ -230,7 +230,11 @@ chip soc/intel/cannonlake
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device pci 1e.1 off end # UART #1
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device pci 1e.1 off end # UART #1
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device pci 1e.2 off end # GSPI #0
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device pci 1e.2 off end # GSPI #0
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device pci 1e.3 off end # GSPI #1
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device pci 1e.3 off end # GSPI #1
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device pci 1f.0 on end # LPC Interface
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device pci 1f.0 on # LPC Interface
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chip drivers/pc80/tpm
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device pnp 0c31.0 on end
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end
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end
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device pci 1f.1 off end # P2SB
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device pci 1f.1 off end # P2SB
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device pci 1f.2 off end # Power Management Controller
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device pci 1f.2 off end # Power Management Controller
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device pci 1f.3 on end # Intel HDA
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device pci 1f.3 on end # Intel HDA
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@ -89,8 +89,8 @@ static const struct pad_config gpio_table[] = {
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PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1),
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// GSPI0
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// GSPI0
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// TODO - TPM_PIRQ#
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// TPM_PIRQ#
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PAD_CFG_NC(GPP_A7),
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PAD_CFG_GPI_APIC_HIGH(GPP_A7, NONE, DEEP),
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// LPC
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// LPC
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// PM_CLKRUN# with pull-up
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// PM_CLKRUN# with pull-up
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@ -12,9 +12,8 @@ config BOARD_SPECIFIC_OPTIONS
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select HAVE_SMI_HANDLER
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select HAVE_SMI_HANDLER
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select INTEL_GMA_HAVE_VBT
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select INTEL_GMA_HAVE_VBT
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select INTEL_LPSS_UART_FOR_CONSOLE
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select INTEL_LPSS_UART_FOR_CONSOLE
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# Chip select 2 is not yet supported by intel fast_spi
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select MAINBOARD_HAS_LPC_TPM
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# select MAINBOARD_HAS_SPI_TPM_CR50
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select MAINBOARD_HAS_TPM2
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# select MAINBOARD_HAS_TPM2
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select NO_UART_ON_SUPERIO
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select NO_UART_ON_SUPERIO
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select PCIEXP_HOTPLUG
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select PCIEXP_HOTPLUG
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select SOC_INTEL_COMMON_ACPI_EC_PTS_WAK
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select SOC_INTEL_COMMON_ACPI_EC_PTS_WAK
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@ -98,13 +97,8 @@ config POST_DEVICE
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bool
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bool
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default n
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default n
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# Chip select 2 is not yet supported by intel fast_spi
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config TPM_PIRQ
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#config DRIVER_TPM_SPI_BUS
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hex
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# hex
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default 0x1F # GPP_A7_IRQ
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# default 0x0
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#
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#config DRIVER_TPM_SPI_CHIP
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# int
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# default 2
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endif
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endif
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@ -230,7 +230,11 @@ chip soc/intel/cannonlake
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device pci 1e.1 off end # UART #1
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device pci 1e.1 off end # UART #1
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device pci 1e.2 off end # GSPI #0
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device pci 1e.2 off end # GSPI #0
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device pci 1e.3 off end # GSPI #1
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device pci 1e.3 off end # GSPI #1
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device pci 1f.0 on end # LPC Interface
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device pci 1f.0 on # LPC Interface
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chip drivers/pc80/tpm
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device pnp 0c31.0 on end
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end
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end
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device pci 1f.1 off end # P2SB
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device pci 1f.1 off end # P2SB
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device pci 1f.2 off end # Power Management Controller
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device pci 1f.2 off end # Power Management Controller
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device pci 1f.3 on end # Intel HDA
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device pci 1f.3 on end # Intel HDA
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@ -89,8 +89,8 @@ static const struct pad_config gpio_table[] = {
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PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1),
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// GSPI0
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// GSPI0
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// TODO - TPM_PIRQ#
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// TPM_PIRQ#
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PAD_CFG_NC(GPP_A7),
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PAD_CFG_GPI_APIC_HIGH(GPP_A7, NONE, DEEP),
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// LPC
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// LPC
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// PM_CLKRUN# with pull-up
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// PM_CLKRUN# with pull-up
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