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Add LPC decode of new memory map regions

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This commit is contained in:
Jeremy Soller
2020-02-17 09:24:23 -07:00
parent 92780afb68
commit d48dd84ae8
1 changed files with 6 additions and 6 deletions
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12
src/mainboard/system76/lemp9/devicetree.cb
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@ -148,14 +148,14 @@ chip soc/intel/cannonlake
# LPC (soc/intel/cannonlake/lpc.c)
# LPC configuration from lspci -s 1f.0 -xxx
# Address 0x84: Decode 0x80 - 0x8F
# Address 0x84: Decode 0x80 - 0x8F (Port 80)
register "gen1_dec" = "0x000c0081"
# Address 0x88: Decode 0x68 - 0x6F
# Address 0x88: Decode 0x68 - 0x6F (PMC)
register "gen2_dec" = "0x00040069"
# Address 0x8C: Decode 0x3320 - 0x332F
register "gen3_dec" = "0x000c3321"
# Address 0x90: Disabled
register "gen4_dec" = "0x00000000"
# Address 0x8C: Decode 0xC00 - 0xCFF (AP/EC command)
register "gen3_dec" = "0x00fc0C01"
# Address 0x90: Decode 0xD00 - 0xDFF (AP/EC debug)
register "gen4_dec" = "0x00fc0D01"
# PMC (soc/intel/cannonlake/pmc.c)
# Enable deep Sx states