mb/system76/adl,rpl: Add 50ms timeout for PCIe 3.0 RPs

The FSP may fail to detect PCIe 4.0 devices in PCIe 3.0 slots on S3
resume. This issue has only been experienced on lemp12, and only with
Samsung drives, but implies it could happen on other systems or with
other drives as well. A timeout of 50ms is arbitrarily chosen.

Tested on lemp12 with Samsung 980 PRO (FW: 3B2QGXA7, 5B2QGXA7) and 990
PRO (FW: 4B2QJXD7) drives.

Change-Id: I4f44fc429c52e407b7566d6bb6dd31b2cf85c48d
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80756
Reviewed-by: Jeremy Soller <jeremy@system76.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Tim Crawford
2024-02-29 11:34:05 -07:00
committed by Felix Held
parent a78388508c
commit b1ed9f4f87
6 changed files with 6 additions and 0 deletions

View File

@@ -152,6 +152,7 @@ chip soc/intel/alderlake
.clk_src = 4,
.clk_req = 4,
.flags = PCIE_RP_LTR,
.pcie_rp_detect_timeout_ms = 50,
}"
# FIXME: Drives do not exit D3cold on S3 exit
#chip soc/intel/common/block/pcie/rtd3

View File

@@ -98,6 +98,7 @@ chip soc/intel/alderlake
.clk_src = 1,
.clk_req = 1,
.flags = PCIE_RP_LTR,
.pcie_rp_detect_timeout_ms = 50,
}"
end
device ref pcie_rp9 on

View File

@@ -130,6 +130,7 @@ chip soc/intel/alderlake
.clk_src = 1,
.clk_req = 1,
.flags = PCIE_RP_LTR,
.pcie_rp_detect_timeout_ms = 50,
}"
end
device ref gbe on end

View File

@@ -138,6 +138,7 @@ chip soc/intel/alderlake
.clk_src = 1,
.clk_req = 1,
.flags = PCIE_RP_LTR,
.pcie_rp_detect_timeout_ms = 50,
}"
# FIXME: Drives do not exit D3cold on S3 exit
#chip soc/intel/common/block/pcie/rtd3

View File

@@ -63,6 +63,7 @@ chip soc/intel/alderlake
.clk_src = 1,
.clk_req = 1,
.flags = PCIE_RP_LTR | PCIE_RP_AER,
.pcie_rp_detect_timeout_ms = 50,
}"
end
device ref pcie_rp9 on

View File

@@ -79,6 +79,7 @@ chip soc/intel/alderlake
.clk_src = 1,
.clk_req = 1,
.flags = PCIE_RP_LTR,
.pcie_rp_detect_timeout_ms = 50,
}"
end
end